[PATCH] D92715: [Clang][RISCV] Define RISC-V V builtin types

[Hsiangkai Wang via Phabricator via cfe-commits]

HsiangKai added a comment.

Ping. If we all agree to use builtin types to model RVV types, is there any other issues we need to address in this patch?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D92715/new/

https://reviews.llvm.org/D92715