[PATCH] D72932: [ARM] Follow AACPS standard for volatile bit-fields access width

Oliver Stannard (Linaro) via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Thu Oct 8 06:13:53 PDT 2020


ostannard added inline comments.


================
Comment at: clang/test/CodeGen/volatile.c:1
-// RUN: %clang_cc1 -triple=%itanium_abi_triple -emit-llvm < %s | FileCheck %s -check-prefix CHECK -check-prefix CHECK-IT
+// RUN: %clang_cc1 -triple=%itanium_abi_triple -emit-llvm < %s | FileCheck %s -check-prefix CHECK -check-prefixes %volatile_prefix
 // RUN: %clang_cc1 -triple=%ms_abi_triple -emit-llvm < %s | FileCheck %s -check-prefix CHECK -check-prefix CHECK-MS
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I think it would be better to change this test to use explicit triples, so that we're always testing both the ARM and non-ARM behaviour, regardless of the default triple.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D72932/new/

https://reviews.llvm.org/D72932



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