[PATCH] D72932: [ARM] Follow AACPS standard for volatile bit-fields access width

[Ties Stuij via Phabricator via cfe-commits]

stuij updated this revision to Diff 296644.
stuij added a comment.

After committing this patch, clang/test/CodeGen/volatile.c failed on Arm/AArch64 buildbot hosts. The reason for this is that `%itanium_abi_triple`, a run line Lit target triple substitution at the top of the file, is filled in with the host arch triple. For example: `aarch64-unknown-linux-gnu`. I've amended the tests to take into account the changes to code generation in this patch.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D72932/new/

https://reviews.llvm.org/D72932

Files:
  clang/include/clang/Basic/CodeGenOptions.def
  clang/include/clang/Driver/Options.td
  clang/lib/CodeGen/CGExpr.cpp
  clang/lib/CodeGen/CGRecordLayout.h
  clang/lib/CodeGen/CGRecordLayoutBuilder.cpp
  clang/lib/Frontend/CompilerInvocation.cpp
  clang/test/CodeGen/aapcs-bitfield.c
  clang/test/CodeGen/bitfield-2.c
  clang/test/CodeGen/lit.local.cfg.py
  clang/test/CodeGen/volatile.c

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