[PATCH] D88759: [RISCV] Add SiFive cores to the CPU option

Mon Oct 5 17:48:24 PDT 2020

jrtc27 added a comment.

In D88759#2313236 <https://reviews.llvm.org/D88759#2313236>, @thakis wrote:

> This seems to break tests: http://45.33.8.238/linux/29545/step_7.txt
>
> Can you take a look and revert for now if it takes a while to fix?

I see it should already have been fixed in a48d480e1f7ebc5d5f93507fe1f519496621e259 <https://reviews.llvm.org/rGa48d480e1f7ebc5d5f93507fe1f519496621e259>.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D88759/new/

https://reviews.llvm.org/D88759