[PATCH] D82502: [PowerPC] Implement Load VSX Vector and Sign Extend and Zero Extend
    Albion Fung via Phabricator via cfe-commits 
    cfe-commits at lists.llvm.org
       
    Fri Jul 24 15:01:06 PDT 2020
    
    
  
Conanap updated this revision to Diff 280597.
Conanap marked 2 inline comments as done.
Conanap retitled this revision from "[PowerPC][Power10]  Implement Load VSX Vector and Sign Extend and Zero Extend" to "[PowerPC] Implement Load VSX Vector and Sign Extend and Zero Extend".
Conanap edited the summary of this revision.
CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D82502/new/
https://reviews.llvm.org/D82502
Files:
  clang/lib/Headers/altivec.h
  clang/test/CodeGen/builtins-ppc-p10vector.c
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.h
  llvm/lib/Target/PowerPC/PPCInstrPrefix.td
  llvm/test/CodeGen/PowerPC/builtins-ppc-p10vsx.ll
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