[PATCH] D81728: [InstCombine] Add target-specific inst combining
Sebastian Neubauer via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Fri Jul 17 05:34:42 PDT 2020
Flakebi updated this revision to Diff 278735.
Flakebi added a comment.
Here you go.
Change return types of TargetTransformInfo::instCombineIntrinsic and others to `Optional<Instruction *>` and `Optional<Value *>`.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D81728/new/
https://reviews.llvm.org/D81728
Files:
clang/test/CodeGen/thinlto-distributed-newpm.ll
llvm/include/llvm/Analysis/TargetTransformInfo.h
llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
llvm/include/llvm/CodeGen/BasicTTIImpl.h
llvm/include/llvm/IR/Function.h
llvm/include/llvm/Transforms/InstCombine/InstCombiner.h
llvm/lib/Analysis/TargetTransformInfo.cpp
llvm/lib/IR/Function.cpp
llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
llvm/lib/Target/AMDGPU/CMakeLists.txt
llvm/lib/Target/AMDGPU/InstCombineTables.td
llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
llvm/lib/Target/ARM/ARMTargetTransformInfo.h
llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h
llvm/lib/Target/X86/CMakeLists.txt
llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
llvm/lib/Target/X86/X86TargetTransformInfo.h
llvm/lib/Transforms/InstCombine/CMakeLists.txt
llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
llvm/lib/Transforms/InstCombine/InstCombineAtomicRMW.cpp
llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
llvm/lib/Transforms/InstCombine/InstCombineInternal.h
llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
llvm/lib/Transforms/InstCombine/InstCombineNegator.cpp
llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp
llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
llvm/lib/Transforms/InstCombine/InstCombineTables.td
llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
llvm/test/CodeGen/Thumb2/mve-intrinsics/predicates.ll
llvm/test/CodeGen/Thumb2/mve-intrinsics/vadc-multiple.ll
llvm/test/CodeGen/Thumb2/mve-vpt-from-intrinsics.ll
llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-demanded-vector-elts.ll
llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
llvm/test/Transforms/InstCombine/AMDGPU/ldexp.ll
llvm/test/Transforms/InstCombine/ARM/mve-v2i2v.ll
llvm/test/Transforms/InstCombine/ARM/neon-intrinsics.ll
llvm/test/Transforms/InstCombine/NVPTX/nvvm-intrins.ll
llvm/test/Transforms/InstCombine/X86/X86FsubCmpCombine.ll
llvm/test/Transforms/InstCombine/X86/addcarry.ll
llvm/test/Transforms/InstCombine/X86/clmulqdq.ll
llvm/test/Transforms/InstCombine/X86/x86-avx2.ll
llvm/test/Transforms/InstCombine/X86/x86-avx512.ll
llvm/test/Transforms/InstCombine/X86/x86-bmi-tbm.ll
llvm/test/Transforms/InstCombine/X86/x86-insertps.ll
llvm/test/Transforms/InstCombine/X86/x86-masked-memops.ll
llvm/test/Transforms/InstCombine/X86/x86-movmsk.ll
llvm/test/Transforms/InstCombine/X86/x86-pack.ll
llvm/test/Transforms/InstCombine/X86/x86-pshufb.ll
llvm/test/Transforms/InstCombine/X86/x86-sse.ll
llvm/test/Transforms/InstCombine/X86/x86-sse2.ll
llvm/test/Transforms/InstCombine/X86/x86-sse41.ll
llvm/test/Transforms/InstCombine/X86/x86-sse4a.ll
llvm/test/Transforms/InstCombine/X86/x86-vec_demanded_elts.ll
llvm/test/Transforms/InstCombine/X86/x86-vector-shifts.ll
llvm/test/Transforms/InstCombine/X86/x86-vpermil.ll
llvm/test/Transforms/InstCombine/X86/x86-xop.ll
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