[PATCH] D80716: [AArch64]: BFloat Load/Store Intrinsics&CodeGen

Matt Arsenault via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Wed Jun 10 07:04:27 PDT 2020


arsenm added inline comments.


================
Comment at: llvm/test/CodeGen/AArch64/aarch64-bf16-ldst-intrinsics.ll:264
+; Function Attrs: argmemonly nounwind readonly
+declare { <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld2lane.v8bf16.p0i8(<8 x bfloat>, <8 x bfloat>, i64, i8*) #3
+
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Why is the IR type name bfloat and not bfloat16?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D80716/new/

https://reviews.llvm.org/D80716





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