[clang] dc2986f - [SveEmitter] Add builtins for SVE2 saturating shift left and addition

Thu May 7 05:34:55 PDT 2020

Author: Sander de Smalen
Date: 2020-05-07T13:31:46+01:00
New Revision: dc2986f9dc02f1003a3b289af899e2926203aaf8

URL: https://github.com/llvm/llvm-project/commit/dc2986f9dc02f1003a3b289af899e2926203aaf8
DIFF: https://github.com/llvm/llvm-project/commit/dc2986f9dc02f1003a3b289af899e2926203aaf8.diff

LOG: [SveEmitter] Add builtins for SVE2 saturating shift left and addition

This patch adds builtins for:
- svqrshl
- svqshl
- svsqadd
- svuqadd

Added: 
    clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshl.c
    clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshl.c
    clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshl.c
    clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sqadd.c
    clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_uqadd.c

Modified: 
    clang/include/clang/Basic/arm_sve.td

Removed: 
    


################################################################################
diff  --git a/clang/include/clang/Basic/arm_sve.td b/clang/include/clang/Basic/arm_sve.td
index 07af044ce1de..5effceb93464 100644

--- a/clang/include/clang/Basic/arm_sve.td
+++ b/clang/include/clang/Basic/arm_sve.td
@@ -1274,6 +1274,28 @@ defm SVRECPE  : SInstZPZ<"svrecpe",  "Ui",   "aarch64_sve_urecpe">;
 defm SVRSQRTE : SInstZPZ<"svrsqrte", "Ui",   "aarch64_sve_ursqrte">;
 }
 
+//------------------------------------------------------------------------------
+
+multiclass SInstZPZxZ<string name, string types, string pat_v, string pat_n, string intrinsic, list<FlagType> flags=[]> {
+  def _M   : SInst<name # "[_{d}]", pat_v, types, MergeOp1,  intrinsic, flags>;
+  def _X   : SInst<name # "[_{d}]", pat_v, types, MergeAny,  intrinsic, flags>;
+  def _Z   : SInst<name # "[_{d}]", pat_v, types, MergeZero, intrinsic, flags>;
+
+  def _N_M : SInst<name # "[_n_{d}]", pat_n, types, MergeOp1,  intrinsic, flags>;
+  def _N_X : SInst<name # "[_n_{d}]", pat_n, types, MergeAny,  intrinsic, flags>;
+  def _N_Z : SInst<name # "[_n_{d}]", pat_n, types, MergeZero, intrinsic, flags>;
+}
+
+let ArchGuard = "defined(__ARM_FEATURE_SVE2)" in {
+defm SVQRSHL_S : SInstZPZxZ<"svqrshl", "csil",     "dPdx", "dPdK", "aarch64_sve_sqrshl">;
+defm SVQRSHL_U : SInstZPZxZ<"svqrshl", "UcUsUiUl", "dPdx", "dPdK", "aarch64_sve_uqrshl">;
+defm SVQSHL_S  : SInstZPZxZ<"svqshl",  "csil",     "dPdx", "dPdK", "aarch64_sve_sqshl">;
+defm SVQSHL_U  : SInstZPZxZ<"svqshl",  "UcUsUiUl", "dPdx", "dPdK", "aarch64_sve_uqshl">;
+defm SVRSHL_S  : SInstZPZxZ<"svrshl",  "csil",     "dPdx", "dPdK", "aarch64_sve_srshl">;
+defm SVRSHL_U  : SInstZPZxZ<"svrshl",  "UcUsUiUl", "dPdx", "dPdK", "aarch64_sve_urshl">;
+defm SVSQADD   : SInstZPZxZ<"svsqadd", "UcUsUiUl", "dPdx", "dPdK", "aarch64_sve_usqadd">;
+defm SVUQADD   : SInstZPZxZ<"svuqadd", "csil",     "dPdu", "dPdL", "aarch64_sve_suqadd">;
+}
 ////////////////////////////////////////////////////////////////////////////////
 // SVE2 - Non-temporal gather/scatter
 let ArchGuard = "defined(__ARM_FEATURE_SVE2)" in {

diff  --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshl.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshl.c
new file mode 100644
index 000000000000..e9233ab9804c
--- /dev/null
+++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshl.c
@@ -0,0 +1,569 @@
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
+#endif
+
+svint8_t test_svqrshl_s8_z(svbool_t pg, svint8_t op1, svint8_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_s8_z
+  // CHECK: %[[SEL:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sel.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sqrshl.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %[[SEL]], <vscale x 16 x i8> %op2)
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_s8_z'}}
+  return SVE_ACLE_FUNC(svqrshl,_s8,_z,)(pg, op1, op2);
+}
+
+svint16_t test_svqrshl_s16_z(svbool_t pg, svint16_t op1, svint16_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_s16_z
+  // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[SEL:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sel.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqrshl.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %[[SEL]], <vscale x 8 x i16> %op2)
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_s16_z'}}
+  return SVE_ACLE_FUNC(svqrshl,_s16,_z,)(pg, op1, op2);
+}
+
+svint32_t test_svqrshl_s32_z(svbool_t pg, svint32_t op1, svint32_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_s32_z
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[SEL:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqrshl.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %[[SEL]], <vscale x 4 x i32> %op2)
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_s32_z'}}
+  return SVE_ACLE_FUNC(svqrshl,_s32,_z,)(pg, op1, op2);
+}
+
+svint64_t test_svqrshl_s64_z(svbool_t pg, svint64_t op1, svint64_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_s64_z
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[SEL:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sel.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sqrshl.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %[[SEL]], <vscale x 2 x i64> %op2)
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_s64_z'}}
+  return SVE_ACLE_FUNC(svqrshl,_s64,_z,)(pg, op1, op2);
+}
+
+svuint8_t test_svqrshl_u8_z(svbool_t pg, svuint8_t op1, svint8_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_u8_z
+  // CHECK: %[[SEL:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sel.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.uqrshl.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %[[SEL]], <vscale x 16 x i8> %op2)
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_u8_z'}}
+  return SVE_ACLE_FUNC(svqrshl,_u8,_z,)(pg, op1, op2);
+}
+
+svuint16_t test_svqrshl_u16_z(svbool_t pg, svuint16_t op1, svint16_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_u16_z
+  // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[SEL:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sel.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqrshl.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %[[SEL]], <vscale x 8 x i16> %op2)
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_u16_z'}}
+  return SVE_ACLE_FUNC(svqrshl,_u16,_z,)(pg, op1, op2);
+}
+
+svuint32_t test_svqrshl_u32_z(svbool_t pg, svuint32_t op1, svint32_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_u32_z
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[SEL:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.uqrshl.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %[[SEL]], <vscale x 4 x i32> %op2)
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_u32_z'}}
+  return SVE_ACLE_FUNC(svqrshl,_u32,_z,)(pg, op1, op2);
+}
+
+svuint64_t test_svqrshl_u64_z(svbool_t pg, svuint64_t op1, svint64_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_u64_z
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[SEL:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sel.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.uqrshl.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %[[SEL]], <vscale x 2 x i64> %op2)
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_u64_z'}}
+  return SVE_ACLE_FUNC(svqrshl,_u64,_z,)(pg, op1, op2);
+}
+
+svint8_t test_svqrshl_s8_m(svbool_t pg, svint8_t op1, svint8_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_s8_m
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sqrshl.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2)
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_s8_m'}}
+  return SVE_ACLE_FUNC(svqrshl,_s8,_m,)(pg, op1, op2);
+}
+
+svint16_t test_svqrshl_s16_m(svbool_t pg, svint16_t op1, svint16_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_s16_m
+  // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqrshl.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2)
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_s16_m'}}
+  return SVE_ACLE_FUNC(svqrshl,_s16,_m,)(pg, op1, op2);
+}
+
+svint32_t test_svqrshl_s32_m(svbool_t pg, svint32_t op1, svint32_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_s32_m
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqrshl.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2)
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_s32_m'}}
+  return SVE_ACLE_FUNC(svqrshl,_s32,_m,)(pg, op1, op2);
+}
+
+svint64_t test_svqrshl_s64_m(svbool_t pg, svint64_t op1, svint64_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_s64_m
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sqrshl.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2)
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_s64_m'}}
+  return SVE_ACLE_FUNC(svqrshl,_s64,_m,)(pg, op1, op2);
+}
+
+svuint8_t test_svqrshl_u8_m(svbool_t pg, svuint8_t op1, svint8_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_u8_m
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.uqrshl.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2)
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_u8_m'}}
+  return SVE_ACLE_FUNC(svqrshl,_u8,_m,)(pg, op1, op2);
+}
+
+svuint16_t test_svqrshl_u16_m(svbool_t pg, svuint16_t op1, svint16_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_u16_m
+  // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqrshl.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2)
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_u16_m'}}
+  return SVE_ACLE_FUNC(svqrshl,_u16,_m,)(pg, op1, op2);
+}
+
+svuint32_t test_svqrshl_u32_m(svbool_t pg, svuint32_t op1, svint32_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_u32_m
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.uqrshl.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2)
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_u32_m'}}
+  return SVE_ACLE_FUNC(svqrshl,_u32,_m,)(pg, op1, op2);
+}
+
+svuint64_t test_svqrshl_u64_m(svbool_t pg, svuint64_t op1, svint64_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_u64_m
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.uqrshl.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2)
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_u64_m'}}
+  return SVE_ACLE_FUNC(svqrshl,_u64,_m,)(pg, op1, op2);
+}
+
+svint8_t test_svqrshl_s8_x(svbool_t pg, svint8_t op1, svint8_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_s8_x
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sqrshl.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2)
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_s8_x'}}
+  return SVE_ACLE_FUNC(svqrshl,_s8,_x,)(pg, op1, op2);
+}
+
+svint16_t test_svqrshl_s16_x(svbool_t pg, svint16_t op1, svint16_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_s16_x
+  // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqrshl.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2)
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_s16_x'}}
+  return SVE_ACLE_FUNC(svqrshl,_s16,_x,)(pg, op1, op2);
+}
+
+svint32_t test_svqrshl_s32_x(svbool_t pg, svint32_t op1, svint32_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_s32_x
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqrshl.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2)
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_s32_x'}}
+  return SVE_ACLE_FUNC(svqrshl,_s32,_x,)(pg, op1, op2);
+}
+
+svint64_t test_svqrshl_s64_x(svbool_t pg, svint64_t op1, svint64_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_s64_x
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sqrshl.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2)
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_s64_x'}}
+  return SVE_ACLE_FUNC(svqrshl,_s64,_x,)(pg, op1, op2);
+}
+
+svuint8_t test_svqrshl_u8_x(svbool_t pg, svuint8_t op1, svint8_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_u8_x
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.uqrshl.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2)
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_u8_x'}}
+  return SVE_ACLE_FUNC(svqrshl,_u8,_x,)(pg, op1, op2);
+}
+
+svuint16_t test_svqrshl_u16_x(svbool_t pg, svuint16_t op1, svint16_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_u16_x
+  // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqrshl.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2)
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_u16_x'}}
+  return SVE_ACLE_FUNC(svqrshl,_u16,_x,)(pg, op1, op2);
+}
+
+svuint32_t test_svqrshl_u32_x(svbool_t pg, svuint32_t op1, svint32_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_u32_x
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.uqrshl.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2)
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_u32_x'}}
+  return SVE_ACLE_FUNC(svqrshl,_u32,_x,)(pg, op1, op2);
+}
+
+svuint64_t test_svqrshl_u64_x(svbool_t pg, svuint64_t op1, svint64_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_u64_x
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.uqrshl.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2)
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_u64_x'}}
+  return SVE_ACLE_FUNC(svqrshl,_u64,_x,)(pg, op1, op2);
+}
+
+svint8_t test_svqrshl_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_n_s8_z
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
+  // CHECK-DAG: %[[SEL:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sel.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sqrshl.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %[[SEL]], <vscale x 16 x i8> %[[DUP]])
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_n_s8_z'}}
+  return SVE_ACLE_FUNC(svqrshl,_n_s8,_z,)(pg, op1, op2);
+}
+
+svint16_t test_svqrshl_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_n_s16_z
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sel.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqrshl.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %[[SEL]], <vscale x 8 x i16> %[[DUP]])
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_n_s16_z'}}
+  return SVE_ACLE_FUNC(svqrshl,_n_s16,_z,)(pg, op1, op2);
+}
+
+svint32_t test_svqrshl_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_n_s32_z
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqrshl.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %[[SEL]], <vscale x 4 x i32> %[[DUP]])
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_n_s32_z'}}
+  return SVE_ACLE_FUNC(svqrshl,_n_s32,_z,)(pg, op1, op2);
+}
+
+svint64_t test_svqrshl_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_n_s64_z
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sel.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sqrshl.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %[[SEL]], <vscale x 2 x i64> %[[DUP]])
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_n_s64_z'}}
+  return SVE_ACLE_FUNC(svqrshl,_n_s64,_z,)(pg, op1, op2);
+}
+
+svuint8_t test_svqrshl_n_u8_z(svbool_t pg, svuint8_t op1, int8_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_n_u8_z
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
+  // CHECK-DAG: %[[SEL:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sel.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.uqrshl.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %[[SEL]], <vscale x 16 x i8> %[[DUP]])
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_n_u8_z'}}
+  return SVE_ACLE_FUNC(svqrshl,_n_u8,_z,)(pg, op1, op2);
+}
+
+svuint16_t test_svqrshl_n_u16_z(svbool_t pg, svuint16_t op1, int16_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_n_u16_z
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sel.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqrshl.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %[[SEL]], <vscale x 8 x i16> %[[DUP]])
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_n_u16_z'}}
+  return SVE_ACLE_FUNC(svqrshl,_n_u16,_z,)(pg, op1, op2);
+}
+
+svuint32_t test_svqrshl_n_u32_z(svbool_t pg, svuint32_t op1, int32_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_n_u32_z
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.uqrshl.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %[[SEL]], <vscale x 4 x i32> %[[DUP]])
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_n_u32_z'}}
+  return SVE_ACLE_FUNC(svqrshl,_n_u32,_z,)(pg, op1, op2);
+}
+
+svuint64_t test_svqrshl_n_u64_z(svbool_t pg, svuint64_t op1, int64_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_n_u64_z
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sel.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.uqrshl.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %[[SEL]], <vscale x 2 x i64> %[[DUP]])
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_n_u64_z'}}
+  return SVE_ACLE_FUNC(svqrshl,_n_u64,_z,)(pg, op1, op2);
+}
+
+svint8_t test_svqrshl_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_n_s8_m
+  // CHECK: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sqrshl.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %[[DUP]])
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_n_s8_m'}}
+  return SVE_ACLE_FUNC(svqrshl,_n_s8,_m,)(pg, op1, op2);
+}
+
+svint16_t test_svqrshl_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_n_s16_m
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqrshl.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %[[DUP]])
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_n_s16_m'}}
+  return SVE_ACLE_FUNC(svqrshl,_n_s16,_m,)(pg, op1, op2);
+}
+
+svint32_t test_svqrshl_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_n_s32_m
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqrshl.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %[[DUP]])
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_n_s32_m'}}
+  return SVE_ACLE_FUNC(svqrshl,_n_s32,_m,)(pg, op1, op2);
+}
+
+svint64_t test_svqrshl_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_n_s64_m
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sqrshl.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %[[DUP]])
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_n_s64_m'}}
+  return SVE_ACLE_FUNC(svqrshl,_n_s64,_m,)(pg, op1, op2);
+}
+
+svuint8_t test_svqrshl_n_u8_m(svbool_t pg, svuint8_t op1, int8_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_n_u8_m
+  // CHECK: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.uqrshl.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %[[DUP]])
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_n_u8_m'}}
+  return SVE_ACLE_FUNC(svqrshl,_n_u8,_m,)(pg, op1, op2);
+}
+
+svuint16_t test_svqrshl_n_u16_m(svbool_t pg, svuint16_t op1, int16_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_n_u16_m
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqrshl.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %[[DUP]])
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_n_u16_m'}}
+  return SVE_ACLE_FUNC(svqrshl,_n_u16,_m,)(pg, op1, op2);
+}
+
+svuint32_t test_svqrshl_n_u32_m(svbool_t pg, svuint32_t op1, int32_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_n_u32_m
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.uqrshl.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %[[DUP]])
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_n_u32_m'}}
+  return SVE_ACLE_FUNC(svqrshl,_n_u32,_m,)(pg, op1, op2);
+}
+
+svuint64_t test_svqrshl_n_u64_m(svbool_t pg, svuint64_t op1, int64_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_n_u64_m
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.uqrshl.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %[[DUP]])
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_n_u64_m'}}
+  return SVE_ACLE_FUNC(svqrshl,_n_u64,_m,)(pg, op1, op2);
+}
+
+svint8_t test_svqrshl_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_n_s8_x
+  // CHECK: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sqrshl.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %[[DUP]])
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_n_s8_x'}}
+  return SVE_ACLE_FUNC(svqrshl,_n_s8,_x,)(pg, op1, op2);
+}
+
+svint16_t test_svqrshl_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_n_s16_x
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqrshl.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %[[DUP]])
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_n_s16_x'}}
+  return SVE_ACLE_FUNC(svqrshl,_n_s16,_x,)(pg, op1, op2);
+}
+
+svint32_t test_svqrshl_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_n_s32_x
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqrshl.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %[[DUP]])
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_n_s32_x'}}
+  return SVE_ACLE_FUNC(svqrshl,_n_s32,_x,)(pg, op1, op2);
+}
+
+svint64_t test_svqrshl_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_n_s64_x
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sqrshl.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %[[DUP]])
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_n_s64_x'}}
+  return SVE_ACLE_FUNC(svqrshl,_n_s64,_x,)(pg, op1, op2);
+}
+
+svuint8_t test_svqrshl_n_u8_x(svbool_t pg, svuint8_t op1, int8_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_n_u8_x
+  // CHECK: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.uqrshl.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %[[DUP]])
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_n_u8_x'}}
+  return SVE_ACLE_FUNC(svqrshl,_n_u8,_x,)(pg, op1, op2);
+}
+
+svuint16_t test_svqrshl_n_u16_x(svbool_t pg, svuint16_t op1, int16_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_n_u16_x
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqrshl.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %[[DUP]])
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_n_u16_x'}}
+  return SVE_ACLE_FUNC(svqrshl,_n_u16,_x,)(pg, op1, op2);
+}
+
+svuint32_t test_svqrshl_n_u32_x(svbool_t pg, svuint32_t op1, int32_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_n_u32_x
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.uqrshl.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %[[DUP]])
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_n_u32_x'}}
+  return SVE_ACLE_FUNC(svqrshl,_n_u32,_x,)(pg, op1, op2);
+}
+
+svuint64_t test_svqrshl_n_u64_x(svbool_t pg, svuint64_t op1, int64_t op2)
+{
+  // CHECK-LABEL: test_svqrshl_n_u64_x
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.uqrshl.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %[[DUP]])
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqrshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqrshl_n_u64_x'}}
+  return SVE_ACLE_FUNC(svqrshl,_n_u64,_x,)(pg, op1, op2);
+}

diff  --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshl.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshl.c
new file mode 100644
index 000000000000..d8c9e19afcd0
--- /dev/null
+++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshl.c
@@ -0,0 +1,569 @@
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
+#endif
+
+svint8_t test_svqshl_s8_z(svbool_t pg, svint8_t op1, svint8_t op2)
+{
+  // CHECK-LABEL: test_svqshl_s8_z
+  // CHECK: %[[SEL:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sel.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sqshl.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %[[SEL]], <vscale x 16 x i8> %op2)
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_s8_z'}}
+  return SVE_ACLE_FUNC(svqshl,_s8,_z,)(pg, op1, op2);
+}
+
+svint16_t test_svqshl_s16_z(svbool_t pg, svint16_t op1, svint16_t op2)
+{
+  // CHECK-LABEL: test_svqshl_s16_z
+  // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[SEL:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sel.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqshl.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %[[SEL]], <vscale x 8 x i16> %op2)
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_s16_z'}}
+  return SVE_ACLE_FUNC(svqshl,_s16,_z,)(pg, op1, op2);
+}
+
+svint32_t test_svqshl_s32_z(svbool_t pg, svint32_t op1, svint32_t op2)
+{
+  // CHECK-LABEL: test_svqshl_s32_z
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[SEL:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqshl.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %[[SEL]], <vscale x 4 x i32> %op2)
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_s32_z'}}
+  return SVE_ACLE_FUNC(svqshl,_s32,_z,)(pg, op1, op2);
+}
+
+svint64_t test_svqshl_s64_z(svbool_t pg, svint64_t op1, svint64_t op2)
+{
+  // CHECK-LABEL: test_svqshl_s64_z
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[SEL:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sel.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sqshl.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %[[SEL]], <vscale x 2 x i64> %op2)
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_s64_z'}}
+  return SVE_ACLE_FUNC(svqshl,_s64,_z,)(pg, op1, op2);
+}
+
+svuint8_t test_svqshl_u8_z(svbool_t pg, svuint8_t op1, svint8_t op2)
+{
+  // CHECK-LABEL: test_svqshl_u8_z
+  // CHECK: %[[SEL:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sel.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.uqshl.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %[[SEL]], <vscale x 16 x i8> %op2)
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_u8_z'}}
+  return SVE_ACLE_FUNC(svqshl,_u8,_z,)(pg, op1, op2);
+}
+
+svuint16_t test_svqshl_u16_z(svbool_t pg, svuint16_t op1, svint16_t op2)
+{
+  // CHECK-LABEL: test_svqshl_u16_z
+  // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[SEL:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sel.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqshl.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %[[SEL]], <vscale x 8 x i16> %op2)
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_u16_z'}}
+  return SVE_ACLE_FUNC(svqshl,_u16,_z,)(pg, op1, op2);
+}
+
+svuint32_t test_svqshl_u32_z(svbool_t pg, svuint32_t op1, svint32_t op2)
+{
+  // CHECK-LABEL: test_svqshl_u32_z
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[SEL:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.uqshl.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %[[SEL]], <vscale x 4 x i32> %op2)
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_u32_z'}}
+  return SVE_ACLE_FUNC(svqshl,_u32,_z,)(pg, op1, op2);
+}
+
+svuint64_t test_svqshl_u64_z(svbool_t pg, svuint64_t op1, svint64_t op2)
+{
+  // CHECK-LABEL: test_svqshl_u64_z
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[SEL:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sel.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.uqshl.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %[[SEL]], <vscale x 2 x i64> %op2)
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_u64_z'}}
+  return SVE_ACLE_FUNC(svqshl,_u64,_z,)(pg, op1, op2);
+}
+
+svint8_t test_svqshl_s8_m(svbool_t pg, svint8_t op1, svint8_t op2)
+{
+  // CHECK-LABEL: test_svqshl_s8_m
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sqshl.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2)
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_s8_m'}}
+  return SVE_ACLE_FUNC(svqshl,_s8,_m,)(pg, op1, op2);
+}
+
+svint16_t test_svqshl_s16_m(svbool_t pg, svint16_t op1, svint16_t op2)
+{
+  // CHECK-LABEL: test_svqshl_s16_m
+  // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqshl.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2)
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_s16_m'}}
+  return SVE_ACLE_FUNC(svqshl,_s16,_m,)(pg, op1, op2);
+}
+
+svint32_t test_svqshl_s32_m(svbool_t pg, svint32_t op1, svint32_t op2)
+{
+  // CHECK-LABEL: test_svqshl_s32_m
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqshl.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2)
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_s32_m'}}
+  return SVE_ACLE_FUNC(svqshl,_s32,_m,)(pg, op1, op2);
+}
+
+svint64_t test_svqshl_s64_m(svbool_t pg, svint64_t op1, svint64_t op2)
+{
+  // CHECK-LABEL: test_svqshl_s64_m
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sqshl.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2)
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_s64_m'}}
+  return SVE_ACLE_FUNC(svqshl,_s64,_m,)(pg, op1, op2);
+}
+
+svuint8_t test_svqshl_u8_m(svbool_t pg, svuint8_t op1, svint8_t op2)
+{
+  // CHECK-LABEL: test_svqshl_u8_m
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.uqshl.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2)
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_u8_m'}}
+  return SVE_ACLE_FUNC(svqshl,_u8,_m,)(pg, op1, op2);
+}
+
+svuint16_t test_svqshl_u16_m(svbool_t pg, svuint16_t op1, svint16_t op2)
+{
+  // CHECK-LABEL: test_svqshl_u16_m
+  // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqshl.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2)
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_u16_m'}}
+  return SVE_ACLE_FUNC(svqshl,_u16,_m,)(pg, op1, op2);
+}
+
+svuint32_t test_svqshl_u32_m(svbool_t pg, svuint32_t op1, svint32_t op2)
+{
+  // CHECK-LABEL: test_svqshl_u32_m
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.uqshl.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2)
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_u32_m'}}
+  return SVE_ACLE_FUNC(svqshl,_u32,_m,)(pg, op1, op2);
+}
+
+svuint64_t test_svqshl_u64_m(svbool_t pg, svuint64_t op1, svint64_t op2)
+{
+  // CHECK-LABEL: test_svqshl_u64_m
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.uqshl.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2)
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_u64_m'}}
+  return SVE_ACLE_FUNC(svqshl,_u64,_m,)(pg, op1, op2);
+}
+
+svint8_t test_svqshl_s8_x(svbool_t pg, svint8_t op1, svint8_t op2)
+{
+  // CHECK-LABEL: test_svqshl_s8_x
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sqshl.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2)
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_s8_x'}}
+  return SVE_ACLE_FUNC(svqshl,_s8,_x,)(pg, op1, op2);
+}
+
+svint16_t test_svqshl_s16_x(svbool_t pg, svint16_t op1, svint16_t op2)
+{
+  // CHECK-LABEL: test_svqshl_s16_x
+  // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqshl.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2)
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_s16_x'}}
+  return SVE_ACLE_FUNC(svqshl,_s16,_x,)(pg, op1, op2);
+}
+
+svint32_t test_svqshl_s32_x(svbool_t pg, svint32_t op1, svint32_t op2)
+{
+  // CHECK-LABEL: test_svqshl_s32_x
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqshl.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2)
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_s32_x'}}
+  return SVE_ACLE_FUNC(svqshl,_s32,_x,)(pg, op1, op2);
+}
+
+svint64_t test_svqshl_s64_x(svbool_t pg, svint64_t op1, svint64_t op2)
+{
+  // CHECK-LABEL: test_svqshl_s64_x
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sqshl.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2)
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_s64_x'}}
+  return SVE_ACLE_FUNC(svqshl,_s64,_x,)(pg, op1, op2);
+}
+
+svuint8_t test_svqshl_u8_x(svbool_t pg, svuint8_t op1, svint8_t op2)
+{
+  // CHECK-LABEL: test_svqshl_u8_x
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.uqshl.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2)
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_u8_x'}}
+  return SVE_ACLE_FUNC(svqshl,_u8,_x,)(pg, op1, op2);
+}
+
+svuint16_t test_svqshl_u16_x(svbool_t pg, svuint16_t op1, svint16_t op2)
+{
+  // CHECK-LABEL: test_svqshl_u16_x
+  // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqshl.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2)
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_u16_x'}}
+  return SVE_ACLE_FUNC(svqshl,_u16,_x,)(pg, op1, op2);
+}
+
+svuint32_t test_svqshl_u32_x(svbool_t pg, svuint32_t op1, svint32_t op2)
+{
+  // CHECK-LABEL: test_svqshl_u32_x
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.uqshl.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2)
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_u32_x'}}
+  return SVE_ACLE_FUNC(svqshl,_u32,_x,)(pg, op1, op2);
+}
+
+svuint64_t test_svqshl_u64_x(svbool_t pg, svuint64_t op1, svint64_t op2)
+{
+  // CHECK-LABEL: test_svqshl_u64_x
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.uqshl.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2)
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_u64_x'}}
+  return SVE_ACLE_FUNC(svqshl,_u64,_x,)(pg, op1, op2);
+}
+
+svint8_t test_svqshl_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2)
+{
+  // CHECK-LABEL: test_svqshl_n_s8_z
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
+  // CHECK-DAG: %[[SEL:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sel.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sqshl.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %[[SEL]], <vscale x 16 x i8> %[[DUP]])
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_n_s8_z'}}
+  return SVE_ACLE_FUNC(svqshl,_n_s8,_z,)(pg, op1, op2);
+}
+
+svint16_t test_svqshl_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2)
+{
+  // CHECK-LABEL: test_svqshl_n_s16_z
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sel.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqshl.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %[[SEL]], <vscale x 8 x i16> %[[DUP]])
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_n_s16_z'}}
+  return SVE_ACLE_FUNC(svqshl,_n_s16,_z,)(pg, op1, op2);
+}
+
+svint32_t test_svqshl_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2)
+{
+  // CHECK-LABEL: test_svqshl_n_s32_z
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqshl.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %[[SEL]], <vscale x 4 x i32> %[[DUP]])
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_n_s32_z'}}
+  return SVE_ACLE_FUNC(svqshl,_n_s32,_z,)(pg, op1, op2);
+}
+
+svint64_t test_svqshl_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2)
+{
+  // CHECK-LABEL: test_svqshl_n_s64_z
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sel.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sqshl.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %[[SEL]], <vscale x 2 x i64> %[[DUP]])
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_n_s64_z'}}
+  return SVE_ACLE_FUNC(svqshl,_n_s64,_z,)(pg, op1, op2);
+}
+
+svuint8_t test_svqshl_n_u8_z(svbool_t pg, svuint8_t op1, int8_t op2)
+{
+  // CHECK-LABEL: test_svqshl_n_u8_z
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
+  // CHECK-DAG: %[[SEL:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sel.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.uqshl.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %[[SEL]], <vscale x 16 x i8> %[[DUP]])
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_n_u8_z'}}
+  return SVE_ACLE_FUNC(svqshl,_n_u8,_z,)(pg, op1, op2);
+}
+
+svuint16_t test_svqshl_n_u16_z(svbool_t pg, svuint16_t op1, int16_t op2)
+{
+  // CHECK-LABEL: test_svqshl_n_u16_z
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sel.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqshl.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %[[SEL]], <vscale x 8 x i16> %[[DUP]])
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_n_u16_z'}}
+  return SVE_ACLE_FUNC(svqshl,_n_u16,_z,)(pg, op1, op2);
+}
+
+svuint32_t test_svqshl_n_u32_z(svbool_t pg, svuint32_t op1, int32_t op2)
+{
+  // CHECK-LABEL: test_svqshl_n_u32_z
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.uqshl.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %[[SEL]], <vscale x 4 x i32> %[[DUP]])
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_n_u32_z'}}
+  return SVE_ACLE_FUNC(svqshl,_n_u32,_z,)(pg, op1, op2);
+}
+
+svuint64_t test_svqshl_n_u64_z(svbool_t pg, svuint64_t op1, int64_t op2)
+{
+  // CHECK-LABEL: test_svqshl_n_u64_z
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sel.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.uqshl.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %[[SEL]], <vscale x 2 x i64> %[[DUP]])
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_n_u64_z'}}
+  return SVE_ACLE_FUNC(svqshl,_n_u64,_z,)(pg, op1, op2);
+}
+
+svint8_t test_svqshl_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2)
+{
+  // CHECK-LABEL: test_svqshl_n_s8_m
+  // CHECK: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sqshl.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %[[DUP]])
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_n_s8_m'}}
+  return SVE_ACLE_FUNC(svqshl,_n_s8,_m,)(pg, op1, op2);
+}
+
+svint16_t test_svqshl_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2)
+{
+  // CHECK-LABEL: test_svqshl_n_s16_m
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqshl.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %[[DUP]])
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_n_s16_m'}}
+  return SVE_ACLE_FUNC(svqshl,_n_s16,_m,)(pg, op1, op2);
+}
+
+svint32_t test_svqshl_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2)
+{
+  // CHECK-LABEL: test_svqshl_n_s32_m
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqshl.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %[[DUP]])
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_n_s32_m'}}
+  return SVE_ACLE_FUNC(svqshl,_n_s32,_m,)(pg, op1, op2);
+}
+
+svint64_t test_svqshl_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2)
+{
+  // CHECK-LABEL: test_svqshl_n_s64_m
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sqshl.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %[[DUP]])
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_n_s64_m'}}
+  return SVE_ACLE_FUNC(svqshl,_n_s64,_m,)(pg, op1, op2);
+}
+
+svuint8_t test_svqshl_n_u8_m(svbool_t pg, svuint8_t op1, int8_t op2)
+{
+  // CHECK-LABEL: test_svqshl_n_u8_m
+  // CHECK: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.uqshl.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %[[DUP]])
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_n_u8_m'}}
+  return SVE_ACLE_FUNC(svqshl,_n_u8,_m,)(pg, op1, op2);
+}
+
+svuint16_t test_svqshl_n_u16_m(svbool_t pg, svuint16_t op1, int16_t op2)
+{
+  // CHECK-LABEL: test_svqshl_n_u16_m
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqshl.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %[[DUP]])
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_n_u16_m'}}
+  return SVE_ACLE_FUNC(svqshl,_n_u16,_m,)(pg, op1, op2);
+}
+
+svuint32_t test_svqshl_n_u32_m(svbool_t pg, svuint32_t op1, int32_t op2)
+{
+  // CHECK-LABEL: test_svqshl_n_u32_m
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.uqshl.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %[[DUP]])
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_n_u32_m'}}
+  return SVE_ACLE_FUNC(svqshl,_n_u32,_m,)(pg, op1, op2);
+}
+
+svuint64_t test_svqshl_n_u64_m(svbool_t pg, svuint64_t op1, int64_t op2)
+{
+  // CHECK-LABEL: test_svqshl_n_u64_m
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.uqshl.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %[[DUP]])
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_n_u64_m'}}
+  return SVE_ACLE_FUNC(svqshl,_n_u64,_m,)(pg, op1, op2);
+}
+
+svint8_t test_svqshl_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2)
+{
+  // CHECK-LABEL: test_svqshl_n_s8_x
+  // CHECK: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sqshl.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %[[DUP]])
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_n_s8_x'}}
+  return SVE_ACLE_FUNC(svqshl,_n_s8,_x,)(pg, op1, op2);
+}
+
+svint16_t test_svqshl_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2)
+{
+  // CHECK-LABEL: test_svqshl_n_s16_x
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqshl.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %[[DUP]])
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_n_s16_x'}}
+  return SVE_ACLE_FUNC(svqshl,_n_s16,_x,)(pg, op1, op2);
+}
+
+svint32_t test_svqshl_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2)
+{
+  // CHECK-LABEL: test_svqshl_n_s32_x
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqshl.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %[[DUP]])
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_n_s32_x'}}
+  return SVE_ACLE_FUNC(svqshl,_n_s32,_x,)(pg, op1, op2);
+}
+
+svint64_t test_svqshl_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2)
+{
+  // CHECK-LABEL: test_svqshl_n_s64_x
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sqshl.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %[[DUP]])
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_n_s64_x'}}
+  return SVE_ACLE_FUNC(svqshl,_n_s64,_x,)(pg, op1, op2);
+}
+
+svuint8_t test_svqshl_n_u8_x(svbool_t pg, svuint8_t op1, int8_t op2)
+{
+  // CHECK-LABEL: test_svqshl_n_u8_x
+  // CHECK: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.uqshl.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %[[DUP]])
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_n_u8_x'}}
+  return SVE_ACLE_FUNC(svqshl,_n_u8,_x,)(pg, op1, op2);
+}
+
+svuint16_t test_svqshl_n_u16_x(svbool_t pg, svuint16_t op1, int16_t op2)
+{
+  // CHECK-LABEL: test_svqshl_n_u16_x
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqshl.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %[[DUP]])
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_n_u16_x'}}
+  return SVE_ACLE_FUNC(svqshl,_n_u16,_x,)(pg, op1, op2);
+}
+
+svuint32_t test_svqshl_n_u32_x(svbool_t pg, svuint32_t op1, int32_t op2)
+{
+  // CHECK-LABEL: test_svqshl_n_u32_x
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.uqshl.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %[[DUP]])
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_n_u32_x'}}
+  return SVE_ACLE_FUNC(svqshl,_n_u32,_x,)(pg, op1, op2);
+}
+
+svuint64_t test_svqshl_n_u64_x(svbool_t pg, svuint64_t op1, int64_t op2)
+{
+  // CHECK-LABEL: test_svqshl_n_u64_x
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.uqshl.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %[[DUP]])
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svqshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svqshl_n_u64_x'}}
+  return SVE_ACLE_FUNC(svqshl,_n_u64,_x,)(pg, op1, op2);
+}

diff  --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshl.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshl.c
new file mode 100644
index 000000000000..c17ab1663255
--- /dev/null
+++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshl.c
@@ -0,0 +1,569 @@
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
+#endif
+
+svint8_t test_svrshl_s8_z(svbool_t pg, svint8_t op1, svint8_t op2)
+{
+  // CHECK-LABEL: test_svrshl_s8_z
+  // CHECK: %[[SEL:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sel.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.srshl.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %[[SEL]], <vscale x 16 x i8> %op2)
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_s8_z'}}
+  return SVE_ACLE_FUNC(svrshl,_s8,_z,)(pg, op1, op2);
+}
+
+svint16_t test_svrshl_s16_z(svbool_t pg, svint16_t op1, svint16_t op2)
+{
+  // CHECK-LABEL: test_svrshl_s16_z
+  // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[SEL:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sel.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.srshl.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %[[SEL]], <vscale x 8 x i16> %op2)
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_s16_z'}}
+  return SVE_ACLE_FUNC(svrshl,_s16,_z,)(pg, op1, op2);
+}
+
+svint32_t test_svrshl_s32_z(svbool_t pg, svint32_t op1, svint32_t op2)
+{
+  // CHECK-LABEL: test_svrshl_s32_z
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[SEL:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.srshl.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %[[SEL]], <vscale x 4 x i32> %op2)
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_s32_z'}}
+  return SVE_ACLE_FUNC(svrshl,_s32,_z,)(pg, op1, op2);
+}
+
+svint64_t test_svrshl_s64_z(svbool_t pg, svint64_t op1, svint64_t op2)
+{
+  // CHECK-LABEL: test_svrshl_s64_z
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[SEL:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sel.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.srshl.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %[[SEL]], <vscale x 2 x i64> %op2)
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_s64_z'}}
+  return SVE_ACLE_FUNC(svrshl,_s64,_z,)(pg, op1, op2);
+}
+
+svuint8_t test_svrshl_u8_z(svbool_t pg, svuint8_t op1, svint8_t op2)
+{
+  // CHECK-LABEL: test_svrshl_u8_z
+  // CHECK: %[[SEL:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sel.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.urshl.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %[[SEL]], <vscale x 16 x i8> %op2)
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_u8_z'}}
+  return SVE_ACLE_FUNC(svrshl,_u8,_z,)(pg, op1, op2);
+}
+
+svuint16_t test_svrshl_u16_z(svbool_t pg, svuint16_t op1, svint16_t op2)
+{
+  // CHECK-LABEL: test_svrshl_u16_z
+  // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[SEL:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sel.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.urshl.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %[[SEL]], <vscale x 8 x i16> %op2)
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_u16_z'}}
+  return SVE_ACLE_FUNC(svrshl,_u16,_z,)(pg, op1, op2);
+}
+
+svuint32_t test_svrshl_u32_z(svbool_t pg, svuint32_t op1, svint32_t op2)
+{
+  // CHECK-LABEL: test_svrshl_u32_z
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[SEL:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.urshl.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %[[SEL]], <vscale x 4 x i32> %op2)
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_u32_z'}}
+  return SVE_ACLE_FUNC(svrshl,_u32,_z,)(pg, op1, op2);
+}
+
+svuint64_t test_svrshl_u64_z(svbool_t pg, svuint64_t op1, svint64_t op2)
+{
+  // CHECK-LABEL: test_svrshl_u64_z
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[SEL:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sel.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.urshl.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %[[SEL]], <vscale x 2 x i64> %op2)
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_u64_z'}}
+  return SVE_ACLE_FUNC(svrshl,_u64,_z,)(pg, op1, op2);
+}
+
+svint8_t test_svrshl_s8_m(svbool_t pg, svint8_t op1, svint8_t op2)
+{
+  // CHECK-LABEL: test_svrshl_s8_m
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.srshl.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2)
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_s8_m'}}
+  return SVE_ACLE_FUNC(svrshl,_s8,_m,)(pg, op1, op2);
+}
+
+svint16_t test_svrshl_s16_m(svbool_t pg, svint16_t op1, svint16_t op2)
+{
+  // CHECK-LABEL: test_svrshl_s16_m
+  // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.srshl.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2)
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_s16_m'}}
+  return SVE_ACLE_FUNC(svrshl,_s16,_m,)(pg, op1, op2);
+}
+
+svint32_t test_svrshl_s32_m(svbool_t pg, svint32_t op1, svint32_t op2)
+{
+  // CHECK-LABEL: test_svrshl_s32_m
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.srshl.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2)
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_s32_m'}}
+  return SVE_ACLE_FUNC(svrshl,_s32,_m,)(pg, op1, op2);
+}
+
+svint64_t test_svrshl_s64_m(svbool_t pg, svint64_t op1, svint64_t op2)
+{
+  // CHECK-LABEL: test_svrshl_s64_m
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.srshl.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2)
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_s64_m'}}
+  return SVE_ACLE_FUNC(svrshl,_s64,_m,)(pg, op1, op2);
+}
+
+svuint8_t test_svrshl_u8_m(svbool_t pg, svuint8_t op1, svint8_t op2)
+{
+  // CHECK-LABEL: test_svrshl_u8_m
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.urshl.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2)
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_u8_m'}}
+  return SVE_ACLE_FUNC(svrshl,_u8,_m,)(pg, op1, op2);
+}
+
+svuint16_t test_svrshl_u16_m(svbool_t pg, svuint16_t op1, svint16_t op2)
+{
+  // CHECK-LABEL: test_svrshl_u16_m
+  // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.urshl.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2)
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_u16_m'}}
+  return SVE_ACLE_FUNC(svrshl,_u16,_m,)(pg, op1, op2);
+}
+
+svuint32_t test_svrshl_u32_m(svbool_t pg, svuint32_t op1, svint32_t op2)
+{
+  // CHECK-LABEL: test_svrshl_u32_m
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.urshl.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2)
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_u32_m'}}
+  return SVE_ACLE_FUNC(svrshl,_u32,_m,)(pg, op1, op2);
+}
+
+svuint64_t test_svrshl_u64_m(svbool_t pg, svuint64_t op1, svint64_t op2)
+{
+  // CHECK-LABEL: test_svrshl_u64_m
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.urshl.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2)
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_u64_m'}}
+  return SVE_ACLE_FUNC(svrshl,_u64,_m,)(pg, op1, op2);
+}
+
+svint8_t test_svrshl_s8_x(svbool_t pg, svint8_t op1, svint8_t op2)
+{
+  // CHECK-LABEL: test_svrshl_s8_x
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.srshl.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2)
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_s8_x'}}
+  return SVE_ACLE_FUNC(svrshl,_s8,_x,)(pg, op1, op2);
+}
+
+svint16_t test_svrshl_s16_x(svbool_t pg, svint16_t op1, svint16_t op2)
+{
+  // CHECK-LABEL: test_svrshl_s16_x
+  // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.srshl.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2)
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_s16_x'}}
+  return SVE_ACLE_FUNC(svrshl,_s16,_x,)(pg, op1, op2);
+}
+
+svint32_t test_svrshl_s32_x(svbool_t pg, svint32_t op1, svint32_t op2)
+{
+  // CHECK-LABEL: test_svrshl_s32_x
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.srshl.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2)
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_s32_x'}}
+  return SVE_ACLE_FUNC(svrshl,_s32,_x,)(pg, op1, op2);
+}
+
+svint64_t test_svrshl_s64_x(svbool_t pg, svint64_t op1, svint64_t op2)
+{
+  // CHECK-LABEL: test_svrshl_s64_x
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.srshl.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2)
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_s64_x'}}
+  return SVE_ACLE_FUNC(svrshl,_s64,_x,)(pg, op1, op2);
+}
+
+svuint8_t test_svrshl_u8_x(svbool_t pg, svuint8_t op1, svint8_t op2)
+{
+  // CHECK-LABEL: test_svrshl_u8_x
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.urshl.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2)
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_u8_x'}}
+  return SVE_ACLE_FUNC(svrshl,_u8,_x,)(pg, op1, op2);
+}
+
+svuint16_t test_svrshl_u16_x(svbool_t pg, svuint16_t op1, svint16_t op2)
+{
+  // CHECK-LABEL: test_svrshl_u16_x
+  // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.urshl.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2)
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_u16_x'}}
+  return SVE_ACLE_FUNC(svrshl,_u16,_x,)(pg, op1, op2);
+}
+
+svuint32_t test_svrshl_u32_x(svbool_t pg, svuint32_t op1, svint32_t op2)
+{
+  // CHECK-LABEL: test_svrshl_u32_x
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.urshl.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2)
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_u32_x'}}
+  return SVE_ACLE_FUNC(svrshl,_u32,_x,)(pg, op1, op2);
+}
+
+svuint64_t test_svrshl_u64_x(svbool_t pg, svuint64_t op1, svint64_t op2)
+{
+  // CHECK-LABEL: test_svrshl_u64_x
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.urshl.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2)
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_u64_x'}}
+  return SVE_ACLE_FUNC(svrshl,_u64,_x,)(pg, op1, op2);
+}
+
+svint8_t test_svrshl_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2)
+{
+  // CHECK-LABEL: test_svrshl_n_s8_z
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
+  // CHECK-DAG: %[[SEL:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sel.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.srshl.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %[[SEL]], <vscale x 16 x i8> %[[DUP]])
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_n_s8_z'}}
+  return SVE_ACLE_FUNC(svrshl,_n_s8,_z,)(pg, op1, op2);
+}
+
+svint16_t test_svrshl_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2)
+{
+  // CHECK-LABEL: test_svrshl_n_s16_z
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sel.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.srshl.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %[[SEL]], <vscale x 8 x i16> %[[DUP]])
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_n_s16_z'}}
+  return SVE_ACLE_FUNC(svrshl,_n_s16,_z,)(pg, op1, op2);
+}
+
+svint32_t test_svrshl_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2)
+{
+  // CHECK-LABEL: test_svrshl_n_s32_z
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.srshl.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %[[SEL]], <vscale x 4 x i32> %[[DUP]])
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_n_s32_z'}}
+  return SVE_ACLE_FUNC(svrshl,_n_s32,_z,)(pg, op1, op2);
+}
+
+svint64_t test_svrshl_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2)
+{
+  // CHECK-LABEL: test_svrshl_n_s64_z
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sel.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.srshl.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %[[SEL]], <vscale x 2 x i64> %[[DUP]])
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_n_s64_z'}}
+  return SVE_ACLE_FUNC(svrshl,_n_s64,_z,)(pg, op1, op2);
+}
+
+svuint8_t test_svrshl_n_u8_z(svbool_t pg, svuint8_t op1, int8_t op2)
+{
+  // CHECK-LABEL: test_svrshl_n_u8_z
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
+  // CHECK-DAG: %[[SEL:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sel.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.urshl.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %[[SEL]], <vscale x 16 x i8> %[[DUP]])
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_n_u8_z'}}
+  return SVE_ACLE_FUNC(svrshl,_n_u8,_z,)(pg, op1, op2);
+}
+
+svuint16_t test_svrshl_n_u16_z(svbool_t pg, svuint16_t op1, int16_t op2)
+{
+  // CHECK-LABEL: test_svrshl_n_u16_z
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sel.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.urshl.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %[[SEL]], <vscale x 8 x i16> %[[DUP]])
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_n_u16_z'}}
+  return SVE_ACLE_FUNC(svrshl,_n_u16,_z,)(pg, op1, op2);
+}
+
+svuint32_t test_svrshl_n_u32_z(svbool_t pg, svuint32_t op1, int32_t op2)
+{
+  // CHECK-LABEL: test_svrshl_n_u32_z
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.urshl.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %[[SEL]], <vscale x 4 x i32> %[[DUP]])
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_n_u32_z'}}
+  return SVE_ACLE_FUNC(svrshl,_n_u32,_z,)(pg, op1, op2);
+}
+
+svuint64_t test_svrshl_n_u64_z(svbool_t pg, svuint64_t op1, int64_t op2)
+{
+  // CHECK-LABEL: test_svrshl_n_u64_z
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sel.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.urshl.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %[[SEL]], <vscale x 2 x i64> %[[DUP]])
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_n_u64_z'}}
+  return SVE_ACLE_FUNC(svrshl,_n_u64,_z,)(pg, op1, op2);
+}
+
+svint8_t test_svrshl_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2)
+{
+  // CHECK-LABEL: test_svrshl_n_s8_m
+  // CHECK: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.srshl.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %[[DUP]])
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_n_s8_m'}}
+  return SVE_ACLE_FUNC(svrshl,_n_s8,_m,)(pg, op1, op2);
+}
+
+svint16_t test_svrshl_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2)
+{
+  // CHECK-LABEL: test_svrshl_n_s16_m
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.srshl.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %[[DUP]])
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_n_s16_m'}}
+  return SVE_ACLE_FUNC(svrshl,_n_s16,_m,)(pg, op1, op2);
+}
+
+svint32_t test_svrshl_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2)
+{
+  // CHECK-LABEL: test_svrshl_n_s32_m
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.srshl.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %[[DUP]])
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_n_s32_m'}}
+  return SVE_ACLE_FUNC(svrshl,_n_s32,_m,)(pg, op1, op2);
+}
+
+svint64_t test_svrshl_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2)
+{
+  // CHECK-LABEL: test_svrshl_n_s64_m
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.srshl.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %[[DUP]])
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_n_s64_m'}}
+  return SVE_ACLE_FUNC(svrshl,_n_s64,_m,)(pg, op1, op2);
+}
+
+svuint8_t test_svrshl_n_u8_m(svbool_t pg, svuint8_t op1, int8_t op2)
+{
+  // CHECK-LABEL: test_svrshl_n_u8_m
+  // CHECK: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.urshl.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %[[DUP]])
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_n_u8_m'}}
+  return SVE_ACLE_FUNC(svrshl,_n_u8,_m,)(pg, op1, op2);
+}
+
+svuint16_t test_svrshl_n_u16_m(svbool_t pg, svuint16_t op1, int16_t op2)
+{
+  // CHECK-LABEL: test_svrshl_n_u16_m
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.urshl.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %[[DUP]])
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_n_u16_m'}}
+  return SVE_ACLE_FUNC(svrshl,_n_u16,_m,)(pg, op1, op2);
+}
+
+svuint32_t test_svrshl_n_u32_m(svbool_t pg, svuint32_t op1, int32_t op2)
+{
+  // CHECK-LABEL: test_svrshl_n_u32_m
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.urshl.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %[[DUP]])
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_n_u32_m'}}
+  return SVE_ACLE_FUNC(svrshl,_n_u32,_m,)(pg, op1, op2);
+}
+
+svuint64_t test_svrshl_n_u64_m(svbool_t pg, svuint64_t op1, int64_t op2)
+{
+  // CHECK-LABEL: test_svrshl_n_u64_m
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.urshl.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %[[DUP]])
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_n_u64_m'}}
+  return SVE_ACLE_FUNC(svrshl,_n_u64,_m,)(pg, op1, op2);
+}
+
+svint8_t test_svrshl_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2)
+{
+  // CHECK-LABEL: test_svrshl_n_s8_x
+  // CHECK: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.srshl.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %[[DUP]])
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_n_s8_x'}}
+  return SVE_ACLE_FUNC(svrshl,_n_s8,_x,)(pg, op1, op2);
+}
+
+svint16_t test_svrshl_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2)
+{
+  // CHECK-LABEL: test_svrshl_n_s16_x
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.srshl.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %[[DUP]])
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_n_s16_x'}}
+  return SVE_ACLE_FUNC(svrshl,_n_s16,_x,)(pg, op1, op2);
+}
+
+svint32_t test_svrshl_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2)
+{
+  // CHECK-LABEL: test_svrshl_n_s32_x
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.srshl.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %[[DUP]])
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_n_s32_x'}}
+  return SVE_ACLE_FUNC(svrshl,_n_s32,_x,)(pg, op1, op2);
+}
+
+svint64_t test_svrshl_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2)
+{
+  // CHECK-LABEL: test_svrshl_n_s64_x
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.srshl.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %[[DUP]])
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_n_s64_x'}}
+  return SVE_ACLE_FUNC(svrshl,_n_s64,_x,)(pg, op1, op2);
+}
+
+svuint8_t test_svrshl_n_u8_x(svbool_t pg, svuint8_t op1, int8_t op2)
+{
+  // CHECK-LABEL: test_svrshl_n_u8_x
+  // CHECK: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.urshl.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %[[DUP]])
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_n_u8_x'}}
+  return SVE_ACLE_FUNC(svrshl,_n_u8,_x,)(pg, op1, op2);
+}
+
+svuint16_t test_svrshl_n_u16_x(svbool_t pg, svuint16_t op1, int16_t op2)
+{
+  // CHECK-LABEL: test_svrshl_n_u16_x
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.urshl.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %[[DUP]])
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_n_u16_x'}}
+  return SVE_ACLE_FUNC(svrshl,_n_u16,_x,)(pg, op1, op2);
+}
+
+svuint32_t test_svrshl_n_u32_x(svbool_t pg, svuint32_t op1, int32_t op2)
+{
+  // CHECK-LABEL: test_svrshl_n_u32_x
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.urshl.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %[[DUP]])
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_n_u32_x'}}
+  return SVE_ACLE_FUNC(svrshl,_n_u32,_x,)(pg, op1, op2);
+}
+
+svuint64_t test_svrshl_n_u64_x(svbool_t pg, svuint64_t op1, int64_t op2)
+{
+  // CHECK-LABEL: test_svrshl_n_u64_x
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.urshl.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %[[DUP]])
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svrshl_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svrshl_n_u64_x'}}
+  return SVE_ACLE_FUNC(svrshl,_n_u64,_x,)(pg, op1, op2);
+}

diff  --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sqadd.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sqadd.c
new file mode 100644
index 000000000000..78f77adc3378
--- /dev/null
+++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sqadd.c
@@ -0,0 +1,289 @@
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
+#endif
+
+svuint8_t test_svsqadd_u8_m(svbool_t pg, svuint8_t op1, svint8_t op2)
+{
+  // CHECK-LABEL: test_svsqadd_u8_m
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.usqadd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2)
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svsqadd_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svsqadd_u8_m'}}
+  return SVE_ACLE_FUNC(svsqadd,_u8,_m,)(pg, op1, op2);
+}
+
+svuint16_t test_svsqadd_u16_m(svbool_t pg, svuint16_t op1, svint16_t op2)
+{
+  // CHECK-LABEL: test_svsqadd_u16_m
+  // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.usqadd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2)
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svsqadd_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svsqadd_u16_m'}}
+  return SVE_ACLE_FUNC(svsqadd,_u16,_m,)(pg, op1, op2);
+}
+
+svuint32_t test_svsqadd_u32_m(svbool_t pg, svuint32_t op1, svint32_t op2)
+{
+  // CHECKA-LABEL: test_svsqadd_u32_m
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.usqadd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2)
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svsqadd_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svsqadd_u32_m'}}
+  return SVE_ACLE_FUNC(svsqadd,_u32,_m,)(pg, op1, op2);
+}
+
+svuint64_t test_svsqadd_u64_m(svbool_t pg, svuint64_t op1, svint64_t op2)
+{
+  // CHECK-LABEL: test_svsqadd_u64_m
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.usqadd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2)
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svsqadd_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svsqadd_u64_m'}}
+  return SVE_ACLE_FUNC(svsqadd,_u64,_m,)(pg, op1, op2);
+}
+
+svuint8_t test_svsqadd_n_u8_m(svbool_t pg, svuint8_t op1, int8_t op2)
+{
+  // CHECK-LABEL: test_svsqadd_n_u8_m
+  // CHECK: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.usqadd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %[[DUP]])
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svsqadd_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svsqadd_n_u8_m'}}
+  return SVE_ACLE_FUNC(svsqadd,_n_u8,_m,)(pg, op1, op2);
+}
+
+svuint16_t test_svsqadd_n_u16_m(svbool_t pg, svuint16_t op1, int16_t op2)
+{
+  // CHECK-LABEL: test_svsqadd_n_u16_m
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.usqadd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %[[DUP]])
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svsqadd_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svsqadd_n_u16_m'}}
+  return SVE_ACLE_FUNC(svsqadd,_n_u16,_m,)(pg, op1, op2);
+}
+
+svuint32_t test_svsqadd_n_u32_m(svbool_t pg, svuint32_t op1, int32_t op2)
+{
+  // CHECK-LABEL: test_svsqadd_n_u32_m
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.usqadd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %[[DUP]])
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svsqadd_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svsqadd_n_u32_m'}}
+  return SVE_ACLE_FUNC(svsqadd,_n_u32,_m,)(pg, op1, op2);
+}
+
+svuint64_t test_svsqadd_n_u64_m(svbool_t pg, svuint64_t op1, int64_t op2)
+{
+  // CHECK-LABEL: test_svsqadd_n_u64_m
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.usqadd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %[[DUP]])
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svsqadd_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svsqadd_n_u64_m'}}
+  return SVE_ACLE_FUNC(svsqadd,_n_u64,_m,)(pg, op1, op2);
+}
+
+svuint8_t test_svsqadd_u8_z(svbool_t pg, svuint8_t op1, svint8_t op2)
+{
+  // CHECK-LABEL: test_svsqadd_u8_z
+  // CHECK: %[[SEL:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sel.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.usqadd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %[[SEL]], <vscale x 16 x i8> %op2)
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svsqadd_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svsqadd_u8_z'}}
+  return SVE_ACLE_FUNC(svsqadd,_u8,_z,)(pg, op1, op2);
+}
+
+svuint16_t test_svsqadd_u16_z(svbool_t pg, svuint16_t op1, svint16_t op2)
+{
+  // CHECK-LABEL: test_svsqadd_u16_z
+  // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[SEL:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sel.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.usqadd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %[[SEL]], <vscale x 8 x i16> %op2)
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svsqadd_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svsqadd_u16_z'}}
+  return SVE_ACLE_FUNC(svsqadd,_u16,_z,)(pg, op1, op2);
+}
+
+svuint32_t test_svsqadd_u32_z(svbool_t pg, svuint32_t op1, svint32_t op2)
+{
+  // CHECK-LABEL: test_svsqadd_u32_z
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[SEL:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.usqadd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %[[SEL]], <vscale x 4 x i32> %op2)
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svsqadd_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svsqadd_u32_z'}}
+  return SVE_ACLE_FUNC(svsqadd,_u32,_z,)(pg, op1, op2);
+}
+
+svuint64_t test_svsqadd_u64_z(svbool_t pg, svuint64_t op1, svint64_t op2)
+{
+  // CHECK-LABEL: test_svsqadd_u64_z
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[SEL:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sel.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.usqadd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %[[SEL]], <vscale x 2 x i64> %op2)
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svsqadd_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svsqadd_u64_z'}}
+  return SVE_ACLE_FUNC(svsqadd,_u64,_z,)(pg, op1, op2);
+}
+
+svuint8_t test_svsqadd_n_u8_z(svbool_t pg, svuint8_t op1, int8_t op2)
+{
+  // CHECK-LABEL: test_svsqadd_n_u8_z
+  // CHECK: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.usqadd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %[[SEL]], <vscale x 16 x i8> %[[DUP]])
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svsqadd_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svsqadd_n_u8_z'}}
+  return SVE_ACLE_FUNC(svsqadd,_n_u8,_z,)(pg, op1, op2);
+}
+
+svuint16_t test_svsqadd_n_u16_z(svbool_t pg, svuint16_t op1, int16_t op2)
+{
+  // CHECK-LABEL: test_svsqadd_n_u16_z
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sel.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.usqadd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %[[SEL]], <vscale x 8 x i16> %[[DUP]])
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svsqadd_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svsqadd_n_u16_z'}}
+  return SVE_ACLE_FUNC(svsqadd,_n_u16,_z,)(pg, op1, op2);
+}
+
+svuint32_t test_svsqadd_n_u32_z(svbool_t pg, svuint32_t op1, int32_t op2)
+{
+  // CHECK-LABEL: test_svsqadd_n_u32_z
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.usqadd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %[[SEL]], <vscale x 4 x i32> %[[DUP]])
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svsqadd_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svsqadd_n_u32_z'}}
+  return SVE_ACLE_FUNC(svsqadd,_n_u32,_z,)(pg, op1, op2);
+}
+
+svuint64_t test_svsqadd_n_u64_z(svbool_t pg, svuint64_t op1, int64_t op2)
+{
+  // CHECK-LABEL: test_svsqadd_n_u64_z
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sel.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.usqadd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %[[SEL]], <vscale x 2 x i64> %[[DUP]])
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svsqadd_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svsqadd_n_u64_z'}}
+  return SVE_ACLE_FUNC(svsqadd,_n_u64,_z,)(pg, op1, op2);
+}
+
+svuint8_t test_svsqadd_u8_x(svbool_t pg, svuint8_t op1, svint8_t op2)
+{
+  // CHECK-LABEL: test_svsqadd_u8_x
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.usqadd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2)
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svsqadd_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svsqadd_u8_x'}}
+  return SVE_ACLE_FUNC(svsqadd,_u8,_x,)(pg, op1, op2);
+}
+
+svuint16_t test_svsqadd_u16_x(svbool_t pg, svuint16_t op1, svint16_t op2)
+{
+  // CHECK-LABEL: test_svsqadd_u16_x
+  // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.usqadd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2)
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svsqadd_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svsqadd_u16_x'}}
+  return SVE_ACLE_FUNC(svsqadd,_u16,_x,)(pg, op1, op2);
+}
+
+svuint32_t test_svsqadd_u32_x(svbool_t pg, svuint32_t op1, svint32_t op2)
+{
+  // CHECKA-LABEL: test_svsqadd_u32_x
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.usqadd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2)
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svsqadd_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svsqadd_u32_x'}}
+  return SVE_ACLE_FUNC(svsqadd,_u32,_x,)(pg, op1, op2);
+}
+
+svuint64_t test_svsqadd_u64_x(svbool_t pg, svuint64_t op1, svint64_t op2)
+{
+  // CHECK-LABEL: test_svsqadd_u64_x
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.usqadd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2)
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svsqadd_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svsqadd_u64_x'}}
+  return SVE_ACLE_FUNC(svsqadd,_u64,_x,)(pg, op1, op2);
+}
+
+svuint8_t test_svsqadd_n_u8_x(svbool_t pg, svuint8_t op1, int8_t op2)
+{
+  // CHECK-LABEL: test_svsqadd_n_u8_x
+  // CHECK: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.usqadd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %[[DUP]])
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svsqadd_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svsqadd_n_u8_x'}}
+  return SVE_ACLE_FUNC(svsqadd,_n_u8,_x,)(pg, op1, op2);
+}
+
+svuint16_t test_svsqadd_n_u16_x(svbool_t pg, svuint16_t op1, int16_t op2)
+{
+  // CHECK-LABEL: test_svsqadd_n_u16_x
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.usqadd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %[[DUP]])
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svsqadd_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svsqadd_n_u16_x'}}
+  return SVE_ACLE_FUNC(svsqadd,_n_u16,_x,)(pg, op1, op2);
+}
+
+svuint32_t test_svsqadd_n_u32_x(svbool_t pg, svuint32_t op1, int32_t op2)
+{
+  // CHECK-LABEL: test_svsqadd_n_u32_x
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.usqadd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %[[DUP]])
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svsqadd_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svsqadd_n_u32_x'}}
+  return SVE_ACLE_FUNC(svsqadd,_n_u32,_x,)(pg, op1, op2);
+}
+
+svuint64_t test_svsqadd_n_u64_x(svbool_t pg, svuint64_t op1, int64_t op2)
+{
+  // CHECK-LABEL: test_svsqadd_n_u64_x
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.usqadd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %[[DUP]])
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svsqadd_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svsqadd_n_u64_x'}}
+  return SVE_ACLE_FUNC(svsqadd,_n_u64,_x,)(pg, op1, op2);
+}

diff  --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_uqadd.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_uqadd.c
new file mode 100644
index 000000000000..19245bd0425e
--- /dev/null
+++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_uqadd.c
@@ -0,0 +1,289 @@
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
+#endif
+
+svint8_t test_svuqadd_u8_m(svbool_t pg, svint8_t op1, svuint8_t op2)
+{
+  // CHECK-LABEL: test_svuqadd_u8_m
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.suqadd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2)
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svuqadd_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svuqadd_s8_m'}}
+  return SVE_ACLE_FUNC(svuqadd,_s8,_m,)(pg, op1, op2);
+}
+
+svint16_t test_svuqadd_u16_m(svbool_t pg, svint16_t op1, svuint16_t op2)
+{
+  // CHECK-LABEL: test_svuqadd_u16_m
+  // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.suqadd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2)
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svuqadd_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svuqadd_s16_m'}}
+  return SVE_ACLE_FUNC(svuqadd,_s16,_m,)(pg, op1, op2);
+}
+
+svint32_t test_svuqadd_u32_m(svbool_t pg, svint32_t op1, svuint32_t op2)
+{
+  // CHECKA-LABEL: test_svuqadd_u32_m
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.suqadd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2)
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svuqadd_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svuqadd_s32_m'}}
+  return SVE_ACLE_FUNC(svuqadd,_s32,_m,)(pg, op1, op2);
+}
+
+svint64_t test_svuqadd_u64_m(svbool_t pg, svint64_t op1, svuint64_t op2)
+{
+  // CHECK-LABEL: test_svuqadd_u64_m
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.suqadd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2)
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svuqadd_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svuqadd_s64_m'}}
+  return SVE_ACLE_FUNC(svuqadd,_s64,_m,)(pg, op1, op2);
+}
+
+svint8_t test_svuqadd_n_s8_m(svbool_t pg, svint8_t op1, uint8_t op2)
+{
+  // CHECK-LABEL: test_svuqadd_n_s8_m
+  // CHECK: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.suqadd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %[[DUP]])
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svuqadd_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svuqadd_n_s8_m'}}
+  return SVE_ACLE_FUNC(svuqadd,_n_s8,_m,)(pg, op1, op2);
+}
+
+svint16_t test_svuqadd_n_s16_m(svbool_t pg, svint16_t op1, uint16_t op2)
+{
+  // CHECK-LABEL: test_svuqadd_n_s16_m
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.suqadd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %[[DUP]])
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svuqadd_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svuqadd_n_s16_m'}}
+  return SVE_ACLE_FUNC(svuqadd,_n_s16,_m,)(pg, op1, op2);
+}
+
+svint32_t test_svuqadd_n_s32_m(svbool_t pg, svint32_t op1, uint32_t op2)
+{
+  // CHECK-LABEL: test_svuqadd_n_s32_m
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.suqadd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %[[DUP]])
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svuqadd_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svuqadd_n_s32_m'}}
+  return SVE_ACLE_FUNC(svuqadd,_n_s32,_m,)(pg, op1, op2);
+}
+
+svint64_t test_svuqadd_n_s64_m(svbool_t pg, svint64_t op1, uint64_t op2)
+{
+  // CHECK-LABEL: test_svuqadd_n_s64_m
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.suqadd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %[[DUP]])
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svuqadd_m'}}
+  // expected-warning at +1 {{implicit declaration of function 'svuqadd_n_s64_m'}}
+  return SVE_ACLE_FUNC(svuqadd,_n_s64,_m,)(pg, op1, op2);
+}
+
+svint8_t test_svuqadd_u8_z(svbool_t pg, svint8_t op1, svuint8_t op2)
+{
+  // CHECK-LABEL: test_svuqadd_u8_z
+  // CHECK: %[[SEL:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sel.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.suqadd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %[[SEL]], <vscale x 16 x i8> %op2)
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svuqadd_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svuqadd_s8_z'}}
+  return SVE_ACLE_FUNC(svuqadd,_s8,_z,)(pg, op1, op2);
+}
+
+svint16_t test_svuqadd_u16_z(svbool_t pg, svint16_t op1, svuint16_t op2)
+{
+  // CHECK-LABEL: test_svuqadd_u16_z
+  // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[SEL:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sel.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.suqadd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %[[SEL]], <vscale x 8 x i16> %op2)
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svuqadd_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svuqadd_s16_z'}}
+  return SVE_ACLE_FUNC(svuqadd,_s16,_z,)(pg, op1, op2);
+}
+
+svint32_t test_svuqadd_u32_z(svbool_t pg, svint32_t op1, svuint32_t op2)
+{
+  // CHECK-LABEL: test_svuqadd_u32_z
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[SEL:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.suqadd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %[[SEL]], <vscale x 4 x i32> %op2)
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svuqadd_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svuqadd_s32_z'}}
+  return SVE_ACLE_FUNC(svuqadd,_s32,_z,)(pg, op1, op2);
+}
+
+svint64_t test_svuqadd_u64_z(svbool_t pg, svint64_t op1, svuint64_t op2)
+{
+  // CHECK-LABEL: test_svuqadd_u64_z
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[SEL:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sel.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.suqadd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %[[SEL]], <vscale x 2 x i64> %op2)
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svuqadd_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svuqadd_s64_z'}}
+  return SVE_ACLE_FUNC(svuqadd,_s64,_z,)(pg, op1, op2);
+}
+
+svint8_t test_svuqadd_n_s8_z(svbool_t pg, svint8_t op1, uint8_t op2)
+{
+  // CHECK-LABEL: test_svuqadd_n_s8_z
+  // CHECK: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.suqadd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %[[SEL]], <vscale x 16 x i8> %[[DUP]])
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svuqadd_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svuqadd_n_s8_z'}}
+  return SVE_ACLE_FUNC(svuqadd,_n_s8,_z,)(pg, op1, op2);
+}
+
+svint16_t test_svuqadd_n_s16_z(svbool_t pg, svint16_t op1, uint16_t op2)
+{
+  // CHECK-LABEL: test_svuqadd_n_s16_z
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sel.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.suqadd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %[[SEL]], <vscale x 8 x i16> %[[DUP]])
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svuqadd_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svuqadd_n_s16_z'}}
+  return SVE_ACLE_FUNC(svuqadd,_n_s16,_z,)(pg, op1, op2);
+}
+
+svint32_t test_svuqadd_n_s32_z(svbool_t pg, svint32_t op1, uint32_t op2)
+{
+  // CHECK-LABEL: test_svuqadd_n_s32_z
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.suqadd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %[[SEL]], <vscale x 4 x i32> %[[DUP]])
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svuqadd_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svuqadd_n_s32_z'}}
+  return SVE_ACLE_FUNC(svuqadd,_n_s32,_z,)(pg, op1, op2);
+}
+
+svint64_t test_svuqadd_n_s64_z(svbool_t pg, svint64_t op1, uint64_t op2)
+{
+  // CHECK-LABEL: test_svuqadd_n_s64_z
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sel.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> zeroinitializer)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.suqadd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %[[SEL]], <vscale x 2 x i64> %[[DUP]])
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svuqadd_z'}}
+  // expected-warning at +1 {{implicit declaration of function 'svuqadd_n_s64_z'}}
+  return SVE_ACLE_FUNC(svuqadd,_n_s64,_z,)(pg, op1, op2);
+}
+
+svint8_t test_svuqadd_u8_x(svbool_t pg, svint8_t op1, svuint8_t op2)
+{
+  // CHECK-LABEL: test_svuqadd_u8_x
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.suqadd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2)
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svuqadd_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svuqadd_s8_x'}}
+  return SVE_ACLE_FUNC(svuqadd,_s8,_x,)(pg, op1, op2);
+}
+
+svint16_t test_svuqadd_u16_x(svbool_t pg, svint16_t op1, svuint16_t op2)
+{
+  // CHECK-LABEL: test_svuqadd_u16_x
+  // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.suqadd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2)
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svuqadd_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svuqadd_s16_x'}}
+  return SVE_ACLE_FUNC(svuqadd,_s16,_x,)(pg, op1, op2);
+}
+
+svint32_t test_svuqadd_u32_x(svbool_t pg, svint32_t op1, svuint32_t op2)
+{
+  // CHECKA-LABEL: test_svuqadd_u32_x
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.suqadd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2)
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svuqadd_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svuqadd_s32_x'}}
+  return SVE_ACLE_FUNC(svuqadd,_s32,_x,)(pg, op1, op2);
+}
+
+svint64_t test_svuqadd_u64_x(svbool_t pg, svint64_t op1, svuint64_t op2)
+{
+  // CHECK-LABEL: test_svuqadd_u64_x
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.suqadd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2)
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svuqadd_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svuqadd_s64_x'}}
+  return SVE_ACLE_FUNC(svuqadd,_s64,_x,)(pg, op1, op2);
+}
+
+svint8_t test_svuqadd_n_s8_x(svbool_t pg, svint8_t op1, uint8_t op2)
+{
+  // CHECK-LABEL: test_svuqadd_n_s8_x
+  // CHECK: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.suqadd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %[[DUP]])
+  // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svuqadd_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svuqadd_n_s8_x'}}
+  return SVE_ACLE_FUNC(svuqadd,_n_s8,_x,)(pg, op1, op2);
+}
+
+svint16_t test_svuqadd_n_s16_x(svbool_t pg, svint16_t op1, uint16_t op2)
+{
+  // CHECK-LABEL: test_svuqadd_n_s16_x
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.suqadd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %[[DUP]])
+  // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svuqadd_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svuqadd_n_s16_x'}}
+  return SVE_ACLE_FUNC(svuqadd,_n_s16,_x,)(pg, op1, op2);
+}
+
+svint32_t test_svuqadd_n_s32_x(svbool_t pg, svint32_t op1, uint32_t op2)
+{
+  // CHECK-LABEL: test_svuqadd_n_s32_x
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.suqadd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %[[DUP]])
+  // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svuqadd_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svuqadd_n_s32_x'}}
+  return SVE_ACLE_FUNC(svuqadd,_n_s32,_x,)(pg, op1, op2);
+}
+
+svint64_t test_svuqadd_n_s64_x(svbool_t pg, svint64_t op1, uint64_t op2)
+{
+  // CHECK-LABEL: test_svuqadd_n_s64_x
+  // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.suqadd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %[[DUP]])
+  // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
+  // overload-warning at +2 {{implicit declaration of function 'svuqadd_x'}}
+  // expected-warning at +1 {{implicit declaration of function 'svuqadd_n_s64_x'}}
+  return SVE_ACLE_FUNC(svuqadd,_n_s64,_x,)(pg, op1, op2);
+}


        
