[PATCH] D77236: [SVE] Cleanup prior to introdution of FixedVectorType

[Christopher Tetreault via Phabricator via cfe-commits]

ctetreau updated this revision to Diff 254285.
ctetreau added a comment.

make lints work


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D77236/new/

https://reviews.llvm.org/D77236

Files:
  clang/lib/CodeGen/CGAtomic.cpp
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/lib/CodeGen/CGExpr.cpp
  clang/lib/CodeGen/CGExprScalar.cpp
  clang/lib/CodeGen/PatternInit.cpp
  clang/lib/CodeGen/TargetInfo.cpp
  llvm/include/llvm/Analysis/Utils/Local.h
  llvm/include/llvm/CodeGen/BasicTTIImpl.h
  llvm/include/llvm/IR/DerivedTypes.h
  llvm/include/llvm/IR/Instructions.h
  llvm/include/llvm/IR/PatternMatch.h
  llvm/include/llvm/IR/Type.h
  llvm/lib/Analysis/ConstantFolding.cpp
  llvm/lib/Analysis/InstructionSimplify.cpp
  llvm/lib/Analysis/Loads.cpp
  llvm/lib/Analysis/MemoryBuiltins.cpp
  llvm/lib/Analysis/TargetTransformInfo.cpp
  llvm/lib/Analysis/ValueTracking.cpp
  llvm/lib/Analysis/VectorUtils.cpp
  llvm/lib/AsmParser/LLParser.cpp
  llvm/lib/Bitcode/Reader/BitcodeReader.cpp
  llvm/lib/CodeGen/CodeGenPrepare.cpp
  llvm/lib/CodeGen/ExpandReductions.cpp
  llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
  llvm/lib/CodeGen/InterleavedAccessPass.cpp
  llvm/lib/CodeGen/ScalarizeMaskedMemIntrin.cpp
  llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
  llvm/lib/IR/AsmWriter.cpp
  llvm/lib/IR/AutoUpgrade.cpp
  llvm/lib/IR/ConstantFold.cpp
  llvm/lib/IR/Constants.cpp
  llvm/lib/IR/ConstantsContext.h
  llvm/lib/IR/Function.cpp
  llvm/lib/IR/IRBuilder.cpp
  llvm/lib/IR/Instructions.cpp
  llvm/lib/IR/Type.cpp
  llvm/lib/IR/Verifier.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
  llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
  llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
  llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
  llvm/lib/Target/ARM/ARMISelLowering.cpp
  llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
  llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp
  llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
  llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
  llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
  llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
  llvm/lib/Target/X86/X86InterleavedAccess.cpp
  llvm/lib/Target/X86/X86PartialReduction.cpp
  llvm/lib/Target/X86/X86ShuffleDecodeConstantPool.cpp
  llvm/lib/Target/X86/X86TargetTransformInfo.cpp
  llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
  llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
  llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
  llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
  llvm/lib/Transforms/InstCombine/InstCombineInternal.h
  llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
  llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
  llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
  llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
  llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
  llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
  llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
  llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
  llvm/lib/Transforms/Instrumentation/PoisonChecking.cpp
  llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
  llvm/lib/Transforms/Scalar/Scalarizer.cpp
  llvm/lib/Transforms/Utils/LoopUtils.cpp
  llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
  llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
  llvm/lib/Transforms/Vectorize/VectorCombine.cpp

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