[PATCH] D74918: Add method to TargetInfo to get CPU cache line size

[Roman Lebedev via Phabricator via cfe-commits]

lebedev.ri added a comment.

No proofs, but for completeness, some amd numbers



================
Comment at: clang/lib/Basic/Targets/X86.cpp:1811-1814
+    // K6
+    case CK_K6:
+    case CK_K6_2:
+    case CK_K6_3:
----------------
K6 should have 32B cache line size


================
Comment at: clang/lib/Basic/Targets/X86.cpp:1815-1832
+    // K7
+    case CK_Athlon:
+    case CK_AthlonXP:
+    // K8
+    case CK_K8:
+    case CK_K8SSE3:
+    case CK_AMDFAM10:
----------------
K7..ZnVer2 should have 64B


================
Comment at: clang/lib/Basic/Targets/X86.cpp:1833-1834
+    case CK_ZNVER2:
+    // Geode
+    case CK_Geode:
+
----------------
32B for this one


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74918/new/

https://reviews.llvm.org/D74918