[PATCH] D74918: Add method to TargetInfo to get CPU cache line size

[Zoe Carver via Phabricator via cfe-commits]

zoecarver created this revision.
Herald added subscribers: cfe-commits, kristof.beyls.
Herald added a project: clang.

This patch adds a virtual method `getCPUCacheLineSize()` to `TargetInfo`. Currently, I've only (partially) implemented the method in `X86TargetInfo`. It's extremely important that each CPU's cache line size correct (e.g., we can't just define it as `64` across the board) so, it has been a little slow getting to this point. There are still quite a few CPUs I haven't been able to find the cache line size of yet; for those, I'm returning zero so that the caller of this method can propagate an error. See the commented table above `X86TargetInfo::getCPUCacheLineSize` to check my sources for each CPU.

I'll work on the ARM CPUs next, but that will probably come later in a different patch.

Also, I updated the current uses of cache line sizes in the compiler to use this API when possible. The only one (that I could find) that I didn't update is in `TargetTransformInfo`. Updating that would require a more significant API change, which would be out of scope for this patch. It would be nice if that also used this API (to keep everything in one place), so I'll try to update that too at some point.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D74918

Files:
  clang/include/clang/Basic/TargetInfo.h
  clang/lib/Basic/Targets/X86.cpp
  clang/lib/Basic/Targets/X86.h
  clang/lib/Sema/SemaStmt.cpp

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