[PATCH] D71124: [RISCV] support clang driver to select cpu
Sam Elliott via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Tue Dec 10 05:16:32 PST 2019
lenary added reviewers: lenary, asb.
lenary added inline comments.
================
Comment at: clang/lib/Basic/Targets/RISCV.cpp:164
+
+static constexpr llvm::StringLiteral ValidRV32CPUNames[] = {{"generic-rv32"},
+ {"rocket-rv32"}};
----------------
Is there not a tablegen'd implementation of these based on https://github.com/llvm/llvm-project/blob/master/llvm/lib/Target/RISCV/RISCV.td#L96-L99 (which will include `rocket-rv32` and `rocket-rv64` when those two schedules are landed)?
Repository:
rC Clang
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D71124/new/
https://reviews.llvm.org/D71124
More information about the cfe-commits
mailing list