[PATCH] D67185: [RISCV] Add support for -ffixed-xX flags

Simon Cook via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Thu Sep 5 02:09:14 PDT 2019


simoncook planned changes to this revision.
simoncook added a comment.

Thanks for the feedback. I will improve the test so it more reliably tests what it intends to.

With regards to behaviour surrounding things such as argument registers, before submitting I checked what the riscv port of GCC does, and it matches this behaviour. If a register is used for arg passing/return values then the option is accepted but silently ignored (at least the register is still used for passing arguments, I haven't confirmed for other regalloc purposes).

I agree that this has the opportunity for allowing users to think they've reserved a register but it is still used. I will look at something more to what you've described AArch64 does in LLVM, and also check that there isn't also a bug on the GCC side, if so I'll get that fixed too.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D67185/new/

https://reviews.llvm.org/D67185





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