[PATCH] D64739: [SVE][Inline-Asm] Add support to clang for SVE inline assembly

[Diana Picus via Phabricator via cfe-commits]

rovka added inline comments.


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Comment at: clang/lib/Basic/Targets/AArch64.cpp:307
 
-    // 32-bit floating point regsisters
+    // 32-bit floating point registers
     "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", "s8", "s9", "s10", "s11",
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You should commit the typo fixes separately.


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Comment at: clang/test/CodeGen/aarch64-sve-inline-asm.c:1
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -emit-llvm -target-feature +sve -o - %s | FileCheck %s
+
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Can you also add a test without +sve, to make sure we get a diagnostic?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D64739/new/

https://reviews.llvm.org/D64739