r352156 - [AArch64] Make the test for rsr and rsr64 stricter

[Hans Wennborg via cfe-commits]

Merged to 8.0 in r352859.

On Fri, Jan 25, 2019 at 3:42 AM Petr Hosek via cfe-commits
<cfe-commits at lists.llvm.org> wrote:
>
> Author: phosek
> Date: Thu Jan 24 18:42:30 2019
> New Revision: 352156
>
> URL: http://llvm.org/viewvc/llvm-project?rev=352156&view=rev
> Log:
> [AArch64] Make the test for rsr and rsr64 stricter
>
> ACLE specifies that return type for rsr and rsr64 is uint32_t and
> uint64_t respectively. D56852 change the return type of rsr64 from
> unsigned long to unsigned long long which at least on Linux doesn't
> match uint64_t, but the test isn't strict enough to detect that
> because compiler implicitly converts unsigned long long to uint64_t,
> but it breaks other uses such as printf with PRIx64 type specifier.
> This change makes the test stricter enforcing that the return type
> of rsr and rsr64 builtins is what is actually specified in ACLE.
>
> Differential Revision: https://reviews.llvm.org/D57210
>
> Modified:
>     cfe/trunk/test/CodeGen/builtins-arm64.c
>
> Modified: cfe/trunk/test/CodeGen/builtins-arm64.c
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-arm64.c?rev=352156&r1=352155&r2=352156&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGen/builtins-arm64.c (original)
> +++ cfe/trunk/test/CodeGen/builtins-arm64.c Thu Jan 24 18:42:30 2019
> @@ -1,4 +1,5 @@
>  // RUN: %clang_cc1 -triple arm64-unknown-linux -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
> +#include <stdint.h>
>
>  void f0(void *a, void *b) {
>         __clear_cache(a,b);
> @@ -49,13 +50,17 @@ void prefetch() {
>  // CHECK: call {{.*}} @llvm.prefetch(i8* null, i32 0, i32 3, i32 0)
>  }
>
> -unsigned rsr() {
> +__typeof__(__builtin_arm_rsr("1:2:3:4:5")) rsr(void);
> +
> +uint32_t rsr() {
>    // CHECK: [[V0:[%A-Za-z0-9.]+]] = call i64 @llvm.read_register.i64(metadata ![[M0:[0-9]]])
>    // CHECK-NEXT: trunc i64 [[V0]] to i32
>    return __builtin_arm_rsr("1:2:3:4:5");
>  }
>
> -unsigned long rsr64() {
> +__typeof__(__builtin_arm_rsr64("1:2:3:4:5")) rsr64(void);
> +
> +uint64_t rsr64() {
>    // CHECK: call i64 @llvm.read_register.i64(metadata ![[M0:[0-9]]])
>    return __builtin_arm_rsr64("1:2:3:4:5");
>  }
>
>
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