[PATCH] D35118: [AArch64] Add support for handling the +sve target feature

[Amara Emerson via Phabricator via cfe-commits]

aemerson added a comment.

In https://reviews.llvm.org/D35118#806730, @rengolin wrote:

> @jmolloy Can you check this change, please?


I'm not really removing FPUMode, I'm just converting an enum to a bit field. FPUMode, i.e. no NEON, after this change is now represented by simply having all bits be 0. See the equivalent implementation for ARM which does the same thing.


Repository:
  rL LLVM

https://reviews.llvm.org/D35118