[all-commits] [llvm/llvm-project] ae93fe: [X86] Extend alignedstore PatFrag to cover atomic_...

jofrn via All-commits all-commits at lists.llvm.org
Thu Jun 4 05:07:13 PDT 2026


  Branch: refs/heads/users/jofrn/keep-split-vector-atomic-store-in-vecreg
  Home:   https://github.com/llvm/llvm-project
  Commit: ae93fed86d47d5d27d92927039837245073fd61a
      https://github.com/llvm/llvm-project/commit/ae93fed86d47d5d27d92927039837245073fd61a
  Author: jofrn <165626406+jofrn at users.noreply.github.com>
  Date:   2026-06-04 (Thu, 04 Jun 2026)

  Changed paths:
    M llvm/include/llvm/Target/TargetSelectionDAG.td
    M llvm/lib/Target/X86/X86InstrAVX512.td
    M llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
    M llvm/test/CodeGen/X86/atomic-load-store.ll

  Log Message:
  -----------
  [X86] Extend alignedstore PatFrag to cover atomic_store


  Commit: 6c022f5972acc87806d2bc7118d82b80c08cba71
      https://github.com/llvm/llvm-project/commit/6c022f5972acc87806d2bc7118d82b80c08cba71
  Author: jofrn <165626406+jofrn at users.noreply.github.com>
  Date:   2026-06-04 (Thu, 04 Jun 2026)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
    M llvm/test/CodeGen/X86/atomic-load-store.ll

  Log Message:
  -----------
  [SelectionDAG] Keep split vector atomic store value in a vector register

When the value of an ATOMIC_STORE has a vector type whose legalization
action is split (e.g. <4 x half>/<4 x bfloat> on X86 without F16C),
SplitVecOp_ATOMIC_STORE bitcast the value straight to a scalar integer
spanning the memory width. For a split vector that bitcast is expanded
element by element, reassembling the value in GPRs (a long pextrw/shl/or
sequence) before the store.

Instead, keep the value in a vector register when a legal vector form
exists: reinterpret it as a same-shaped integer-element vector (an FP
element type may have no legal vector form, e.g. bfloat on SSE2, while
the integer-of-element-size form does), widen that to a legal vector,
and extract the low integer element of the memory width. This issues the
store directly from a vector register (a single MOVQ/MOVD on X86),
matching the widen-path codegen already produced on AVX targets. Falls
back to the scalar bitcast when no suitable legal vector type exists.


Compare: https://github.com/llvm/llvm-project/compare/ae93fed86d47%5E...6c022f5972ac

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