[all-commits] [llvm/llvm-project] 106259: [AArch64]Add convert and multiply-add SIMD&FP asse...

[CarolineConcatto via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 106259510f6a7a3824dd34f78a77ead150dd2154
      https://github.com/llvm/llvm-project/commit/106259510f6a7a3824dd34f78a77ead150dd2154
  Author: CarolineConcatto <caroline.concatto at arm.com>
  Date:   2024-10-28 (Mon, 28 Oct 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64InstrFormats.td
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    A llvm/test/MC/AArch64/FP8/fmmla-diagnostics.s
    A llvm/test/MC/AArch64/FP8/fmmla.s
    A llvm/test/MC/AArch64/armv9.6a-cvtf.s
    A llvm/test/MC/AArch64/armv9.6a-fcvt.s
    M llvm/test/MC/AArch64/directive-arch-negative.s
    M llvm/test/MC/AArch64/directive-arch.s
    M llvm/test/MC/AArch64/directive-arch_extension-negative.s
    M llvm/test/MC/AArch64/directive-arch_extension.s
    M llvm/test/MC/AArch64/directive-cpu.s
    M llvm/test/MC/AArch64/neon-diagnostics.s

  Log Message:
  -----------
  [AArch64]Add convert and multiply-add SIMD&FP assembly/disassembly in… (#113296)

…structions

This patch adds the following instructions:
Conversion between floating-point and integer:
  FCVT{AS, AU, MS, MU, NS, NU, PS, PU, ZS, ZU}
  {S,U}CVTF
Advanced SIMD three-register extension:
  FMMLA

According to https://developer.arm.com/documentation/ddi0602

Co-authored-by: Marian Lukac marian.lukac at arm.com
Co-authored-by: Spencer Abson spencer.abson at arm.com



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