[all-commits] [llvm/llvm-project] d2e953: [DemoteRegToStack] Use correct variable for branch...
Fangrui Song via All-commits
all-commits at lists.llvm.org
Mon Oct 28 09:29:44 PDT 2024
Branch: refs/heads/users/MaskRay/spr/llvm-objdump-handle-m-for-macho
Home: https://github.com/llvm/llvm-project
Commit: d2e9532fe12dc2568f40c2648ff4bb3730141aed
https://github.com/llvm/llvm-project/commit/d2e9532fe12dc2568f40c2648ff4bb3730141aed
Author: Eirik Byrkjeflot Anonsen <eirik at eirikba.org>
Date: 2024-10-27 (Sun, 27 Oct 2024)
Changed paths:
M llvm/lib/Transforms/Utils/DemoteRegToStack.cpp
Log Message:
-----------
[DemoteRegToStack] Use correct variable for branch instructions in DemoteRegToStack (#113798)
I happened to see this code, and it seems "obviously" wrong to me. So
here's what I think this code is supposed to look like.
Commit: 45c84d59c454ba2b57affcd09a74f8d91e93bff7
https://github.com/llvm/llvm-project/commit/45c84d59c454ba2b57affcd09a74f8d91e93bff7
Author: goldsteinn <35538541+goldsteinn at users.noreply.github.com>
Date: 2024-10-27 (Sun, 27 Oct 2024)
Changed paths:
M libc/src/__support/CMakeLists.txt
M libc/src/__support/libc_assert.h
M libc/src/assert/assert.h
Log Message:
-----------
[libc] Add `__builtin_expect` tag on assert conditions; NFC (#99498)
Commit: 5287a9b3456fe7aefa24c8da95ef265b8dba875b
https://github.com/llvm/llvm-project/commit/5287a9b3456fe7aefa24c8da95ef265b8dba875b
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-27 (Sun, 27 Oct 2024)
Changed paths:
M mlir/include/mlir/Support/IndentedOstream.h
M mlir/lib/Query/QueryParser.cpp
Log Message:
-----------
[mlir] Prefer StringRef::substr to slice (NFC) (#113788)
I'm planning to migrate StringRef to std::string_view
eventually. Since std::string_view does not have slice, this patch
migrates:
slice(0, N) to substr(0, N)
slice(N, StringRef::npos) to substr(N)
Commit: 7fe149cdf09d04fb8390b97c91bd9214c968cd3e
https://github.com/llvm/llvm-project/commit/7fe149cdf09d04fb8390b97c91bd9214c968cd3e
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-10-27 (Sun, 27 Oct 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
Log Message:
-----------
[VPlan] Replace getIRBasicBlock with IRBB in VPIRBB::execute (NFC).
Suggested in https://github.com/llvm/llvm-project/pull/109975. This
makes the function consistent throughout.
Commit: e33aec89ef1378d80e8df2e965ac5e6e6aa2e3de
https://github.com/llvm/llvm-project/commit/e33aec89ef1378d80e8df2e965ac5e6e6aa2e3de
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2024-10-27 (Sun, 27 Oct 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
Log Message:
-----------
[MLIR][NVVM] Update the elect.sync Op to use intrinsics (#113757)
Recently, we added an intrinsic for the elect.sync PTX instruction (PR
104780). This patch updates the corresponding Op in NVVM Dialect
to lower to the intrinsic instead of inline-ptx.
The existing test under Conversion/ is migrated to check for the new
pattern. A separate test is added to verify the lowered intrinsic under
the Target/ directory.
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: eef3766ae5a39fea6f7f81ac444f878969743d85
https://github.com/llvm/llvm-project/commit/eef3766ae5a39fea6f7f81ac444f878969743d85
Author: Kiran Chandramohan <kiran.chandramohan at arm.com>
Date: 2024-10-27 (Sun, 27 Oct 2024)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Semantics/OpenMP/default-none.f90
Log Message:
-----------
Assumed-size arrays are shared and cannot be privatized (#112963)
Do not error out if default(none) is specified and the region has an
assumed-size array.
Fixes #110442
Commit: 5621929f7f4878c318deecb592cd03f5ecbb83ba
https://github.com/llvm/llvm-project/commit/5621929f7f4878c318deecb592cd03f5ecbb83ba
Author: Kiran Chandramohan <kiran.chandramohan at arm.com>
Date: 2024-10-27 (Sun, 27 Oct 2024)
Changed paths:
M flang/examples/FeatureList/FeatureList.cpp
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
A flang/test/Parser/OpenMP/taskloop.f90
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[Flang][OpenMP] Add parser support for grainsize and num_tasks clause (#113136)
These clauses are applicable only for the taskloop directive. Since the
directive has a TODO error, skipping the addition of TODOs for these
clauses.
Commit: 7b3da7b3b2b0e2f322dddf1f343571cc7fd09b09
https://github.com/llvm/llvm-project/commit/7b3da7b3b2b0e2f322dddf1f343571cc7fd09b09
Author: Thorsten Schütt <schuett at gmail.com>
Date: 2024-10-27 (Sun, 27 Oct 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
M llvm/lib/Target/AArch64/AArch64GenRegisterBankInfo.def
M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
A llvm/test/CodeGen/AArch64/GlobalISel/sve-integer.ll
Log Message:
-----------
[GlobalISel][AArch64] Legalize G_ADD, G_SUB, G_AND, G_OR, and G_XOR for SVE (#110561)
Credits: https://github.com/llvm/llvm-project/pull/72976
LLVM ERROR: cannot select: %3:zpr(<vscale x 2 x s64>) = G_MUL %0:fpr,
%1:fpr (in function: xmulnxv2i64)
;; mul
define void @xmulnxv2i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b,
ptr %p) {
entry:
%c = mul <vscale x 2 x i64> %a, %b
store <vscale x 2 x i64> %c, ptr %p, align 16
ret void
}
define void @mulnxv4i32(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b,
ptr %p) {
entry:
%c = mul <vscale x 4 x i32> %a, %b
store <vscale x 4 x i32> %c, ptr %p, align 16
ret void
}
define void @mulnxv8i16(<vscale x 8 x i16> %a, <vscale x 8 x i16> %b,
ptr %p) {
entry:
%c = mul <vscale x 8 x i16> %a, %b
store <vscale x 8 x i16> %c, ptr %p, align 16
ret void
}
define void @mulnxv16i8(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b,
ptr %p) {
entry:
%c = mul <vscale x 16 x i8> %a, %b
store <vscale x 16 x i8> %c, ptr %p, align 16
ret void
}
Commit: fb33af08e4c105a05855f8beeb972d493410e72f
https://github.com/llvm/llvm-project/commit/fb33af08e4c105a05855f8beeb972d493410e72f
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2024-10-27 (Sun, 27 Oct 2024)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGen/builtins-nvptx-native-half-type-native.c
M clang/test/CodeGen/builtins-nvptx-native-half-type.c
M clang/test/CodeGen/builtins-nvptx.c
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
Log Message:
-----------
[NVPTX] Remove nvvm.ldg.global.* intrinsics (#112834)
Remove these intrinsics which can be better represented by load
instructions with `!invariant.load` metadata:
- llvm.nvvm.ldg.global.i
- llvm.nvvm.ldg.global.f
- llvm.nvvm.ldg.global.p
Commit: 1fe8e7838bb5118b9e48fa15fa21a4638bae8ae1
https://github.com/llvm/llvm-project/commit/1fe8e7838bb5118b9e48fa15fa21a4638bae8ae1
Author: Fangrui Song <i at maskray.me>
Date: 2024-10-27 (Sun, 27 Oct 2024)
Changed paths:
M llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
Log Message:
-----------
[X86] Rename the x86-asm-syntax variable. NFC
Follow-up to #109360. x86-asm-syntax is for input instead of output.
Commit: 40fffba9b29141d598bf36cdc4bb886e97143d06
https://github.com/llvm/llvm-project/commit/40fffba9b29141d598bf36cdc4bb886e97143d06
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avx10_2bf16-arith.ll
Log Message:
-----------
[X86][AVX10.2] Fix wrong predicates for BF16 feature (#113800)
Since AVX10.2, we need to enable 128/256-bit vector by default and check
for 512 feature for 512-bit vector.
Commit: 7ad63c0e44ef277591497a176991e7723165611e
https://github.com/llvm/llvm-project/commit/7ad63c0e44ef277591497a176991e7723165611e
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M mlir/lib/Conversion/MathToFuncs/MathToFuncs.cpp
M mlir/test/Conversion/MathToFuncs/ctlz.mlir
M mlir/test/Conversion/MathToFuncs/ipowi.mlir
Log Message:
-----------
[mlir][MathToFuncs] `MathToFuncs` only support integer type (#113693)
This PR fixes a bug in `MathToFuncs` where it incorrectly converts index
type for `math.ctlz` and `math.ipowi`, leading to a crash. Fixes
#108150.
Commit: 39ac64c1c0fc61a476aa22c53e6977608ead03cf
https://github.com/llvm/llvm-project/commit/39ac64c1c0fc61a476aa22c53e6977608ead03cf
Author: donald chen <chenxunyu1993 at gmail.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M mlir/lib/Dialect/Arith/IR/ValueBoundsOpInterfaceImpl.cpp
Log Message:
-----------
[mlir][Arith] ValueBoundsInterface: speedup arith.select (#113531)
When calculating value bounds in the arith.select op , the compare
function is invoked to compare trueValue and falseValue. This function
rebuilds constraints, resulting in repeated computations of value
bounds.
In large-scale programs, this redundancy significantly impacts
compilation time.
Commit: 5aa1275d03b679f45f47f29f206292f663afed83
https://github.com/llvm/llvm-project/commit/5aa1275d03b679f45f47f29f206292f663afed83
Author: Freddy Ye <freddy.ye at intel.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/BuiltinsX86.def
M clang/lib/Headers/CMakeLists.txt
M clang/lib/Headers/immintrin.h
A clang/lib/Headers/sm4evexintrin.h
A clang/test/CodeGen/X86/sm4-evex-builtins.c
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/lib/Target/X86/X86InstrAVX10.td
A llvm/test/CodeGen/X86/sm4-evex-intrinsics.ll
A llvm/test/MC/Disassembler/X86/sm4-evex-32.txt
A llvm/test/MC/Disassembler/X86/sm4-evex-64.txt
A llvm/test/MC/X86/sm4-evex-32-att.s
A llvm/test/MC/X86/sm4-evex-32-intel.s
A llvm/test/MC/X86/sm4-evex-64-att.s
A llvm/test/MC/X86/sm4-evex-64-intel.s
M llvm/test/TableGen/x86-fold-tables.inc
Log Message:
-----------
[X86] Support SM4 EVEX version intrinsics/instructions. (#113402)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/671368
Commit: 7236893c956a7e026fee59a1de1767ce15b78e7f
https://github.com/llvm/llvm-project/commit/7236893c956a7e026fee59a1de1767ce15b78e7f
Author: Fangrui Song <i at maskray.me>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/BuiltinsX86.def
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/CMakeLists.txt
M clang/lib/Headers/immintrin.h
A clang/lib/Headers/sm4evexintrin.h
A clang/test/CodeGen/X86/sm4-evex-builtins.c
M clang/test/CodeGen/builtins-nvptx-native-half-type-native.c
M clang/test/CodeGen/builtins-nvptx-native-half-type.c
M clang/test/CodeGen/builtins-nvptx.c
M flang/examples/FeatureList/FeatureList.cpp
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Parser/OpenMP/taskloop.f90
M flang/test/Semantics/OpenMP/default-none.f90
M libc/src/__support/CMakeLists.txt
M libc/src/__support/libc_assert.h
M libc/src/assert/assert.h
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/AArch64/AArch64GenRegisterBankInfo.def
M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrAVX10.td
M llvm/lib/Transforms/Utils/DemoteRegToStack.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
A llvm/test/CodeGen/AArch64/GlobalISel/sve-integer.ll
M llvm/test/CodeGen/X86/avx10_2bf16-arith.ll
A llvm/test/CodeGen/X86/sm4-evex-intrinsics.ll
A llvm/test/MC/Disassembler/X86/sm4-evex-32.txt
A llvm/test/MC/Disassembler/X86/sm4-evex-64.txt
A llvm/test/MC/X86/sm4-evex-32-att.s
A llvm/test/MC/X86/sm4-evex-32-intel.s
A llvm/test/MC/X86/sm4-evex-64-att.s
A llvm/test/MC/X86/sm4-evex-64-intel.s
M llvm/test/TableGen/x86-fold-tables.inc
M llvm/test/tools/llvm-objdump/MachO/AArch64/aliases.s
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/include/mlir/Support/IndentedOstream.h
M mlir/lib/Conversion/MathToFuncs/MathToFuncs.cpp
M mlir/lib/Dialect/Arith/IR/ValueBoundsOpInterfaceImpl.cpp
M mlir/lib/Query/QueryParser.cpp
M mlir/test/Conversion/MathToFuncs/ctlz.mlir
M mlir/test/Conversion/MathToFuncs/ipowi.mlir
M mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
Log Message:
-----------
add a positive test
Created using spr 1.3.5-bogner
Compare: https://github.com/llvm/llvm-project/compare/4285cd492b31...7236893c956a
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