[all-commits] [llvm/llvm-project] 7177dc: [SDAG] Apply or-disjoint in SelectionDAG::isBaseWi...

[fengfeng via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 7177dc2ef7f3a50a1d8b892d7bd298f3d52a1aab
      https://github.com/llvm/llvm-project/commit/7177dc2ef7f3a50a1d8b892d7bd298f3d52a1aab
  Author: fengfeng <153487255+fengfeng09 at users.noreply.github.com>
  Date:   2024-04-15 (Mon, 15 Apr 2024)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    A llvm/test/CodeGen/AVR/base-with-add-like-constant-offset.ll

  Log Message:
  -----------
  [SDAG] Apply or-disjoint in SelectionDAG::isBaseWithConstantOffset (#88493)

Signed-off-by: feng.feng <feng.feng at iluvatar.com>



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