[all-commits] [llvm/llvm-project] d37ced: AMDGPU: refactor phi lowering from SILowerI1Copies...

[Petar Avramovic via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d37ced88809cb4d2df57ec80887b3f8801ca719b
      https://github.com/llvm/llvm-project/commit/d37ced88809cb4d2df57ec80887b3f8801ca719b
  Author: Petar Avramovic <Petar.Avramovic at amd.com>
  Date:   2023-12-15 (Fri, 15 Dec 2023)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
    A llvm/lib/Target/AMDGPU/SILowerI1Copies.h

  Log Message:
  -----------
  AMDGPU: refactor phi lowering from SILowerI1Copies (NFCI) (#75349)

Make abstract class PhiLoweringHelper and expose it for use in
GlobalISel path.
SILowerI1Copies implements PhiLoweringHelper as Vreg1LoweringHelper and
it is equivalent to SILowerI1Copies.
Notable change that createLaneMaskReg now clones attributes from
register that has lane mask attributes instead of creating register with
lane mask register class. This is because lane masks have
different(more) attributes in GlobalISel.

patch 2 from: https://github.com/llvm/llvm-project/pull/73337