[all-commits] [llvm/llvm-project] f2464c: [SVE2.1][Clang][LLVM]Int/FP reduce builtin in Clan...

[CarolineConcatto via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f2464ca317bfeeedddb7cbdea3c2c8ec487890bb
      https://github.com/llvm/llvm-project/commit/f2464ca317bfeeedddb7cbdea3c2c8ec487890bb
  Author: CarolineConcatto <caroline.concatto at arm.com>
  Date:   2023-12-13 (Wed, 13 Dec 2023)

  Changed paths:
    M clang/include/clang/Basic/TargetBuiltins.h
    M clang/include/clang/Basic/arm_sve.td
    M clang/include/clang/Basic/arm_sve_sme_incl.td
    M clang/lib/CodeGen/CGBuiltin.cpp
    A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_fp_reduce.c
    A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_int_reduce.c
    M clang/utils/TableGen/SveEmitter.cpp
    M llvm/include/llvm/IR/IntrinsicsAArch64.td
    M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
    M llvm/lib/Target/AArch64/SVEInstrFormats.td
    A llvm/test/CodeGen/AArch64/sve2p1-intrinsics-fp-reduce.ll
    A llvm/test/CodeGen/AArch64/sve2p1-intrinsics-int-reduce.ll

  Log Message:
  -----------
  [SVE2.1][Clang][LLVM]Int/FP reduce builtin in Clang and LLVM intrinsic (#69926)

This patch implements the builtins in Clang
and the LLVM-IR intrinsic for the following:

// Variants are also available for:
// _s8, _s16, _u16, _s32, _u32, _s64, _u64,
// _f16, _f32, _f64uint8x16_t svaddqv[_u8](svbool_t pg, svuint8_t zn);

// Variants are also available for:
// _s8, _u16, _s16, _u32, _s32, _u64, _s64
uint8x16_t svandqv[_u8](svbool_t pg, svuint8_t zn); uint8x16_t
sveorqv[_u8](svbool_t pg, svuint8_t zn); uint8x16_t svorqv[_u8](svbool_t
pg, svuint8_t zn);

// Variants are also available for:
// _s8, _u16, _s16, _u32, _s32, _u64, _s64;
uint8x16_t svmaxqv[_u8](svbool_t pg, svuint8_t zn); uint8x16_t
svminqv[_u8](svbool_t pg, svuint8_t zn);

// Variants are also available for _f32, _f64
float16x8_t svmaxnmqv[_f16](svbool_t pg, svfloat16_t zn); float16x8_t
svminnmqv[_f16](svbool_t pg, svfloat16_t zn);

According to the PR#257[1]

The reduction instruction uses scalable vectors as input and fixed
vectors as output, therefore we changed SVEEmitter to emit fixed vector
types in case the neon header(arm_neon.h) is not present.

[1]https://github.com/ARM-software/acle/pull/257

Co-author: Dinar Temirbulatov <dinar.temirbulatov at arm.com>