[all-commits] [llvm/llvm-project] 6892c1: AMDGPU/GlobalISel: add AMDGPUGlobalISelDivergenceL...

Petar Avramovic via All-commits all-commits at lists.llvm.org
Wed Dec 13 07:43:10 PST 2023


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 6892c175c565e59cf485ada6b1febd41b4666414
      https://github.com/llvm/llvm-project/commit/6892c175c565e59cf485ada6b1febd41b4666414
  Author: Petar Avramovic <Petar.Avramovic at amd.com>
  Date:   2023-12-13 (Wed, 13 Dec 2023)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPU.h
    A llvm/lib/Target/AMDGPU/AMDGPUGlobalISelDivergenceLowering.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
    M llvm/lib/Target/AMDGPU/CMakeLists.txt
    A llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
    A llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.mir
    A llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
    A llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.mir
    A llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
    A llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.mir
    A llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
    A llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.mir
    A llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-reg.ll
    A llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-reg.mir

  Log Message:
  -----------
  AMDGPU/GlobalISel: add AMDGPUGlobalISelDivergenceLowering pass (#75340)

Add empty AMDGPUGlobalISelDivergenceLowering pass. This pass will
implement
- selection of divergent i1 phis as lane mask phis, requires lane mask
merging in some cases
- lower uses of divergent i1 values outside of the cycle using lane mask
merging
- lowering of all cases of temporal divergence:
- lower uses of uniform i1 values outside of the cycle using lane mask
merging
- lower uses of uniform non-i1 values outside of the cycle using a copy
to vgpr inside of the cycle

Add very detailed set of regression tests for cases mentioned above.

patch 1 from: https://github.com/llvm/llvm-project/pull/73337




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