[all-commits] [llvm/llvm-project] 7e0bae: [RISCV][GISel] Add isel patterns for SHXADD with s...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 7e0bae5b3433b2b7c076912d5f249e6af5881947
      https://github.com/llvm/llvm-project/commit/7e0bae5b3433b2b7c076912d5f249e6af5881947
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-11-10 (Fri, 10 Nov 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVGISel.td
    M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/zba-rv64.mir

  Log Message:
  -----------
  [RISCV][GISel] Add isel patterns for SHXADD with s32 type on RV64.