[all-commits] [llvm/llvm-project] cbdccb: [RA] Split a virtual register in cold blocks if it...

[weiguozhi via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: cbdccb30c23f71f20d05b19256232419e7c5e517
      https://github.com/llvm/llvm-project/commit/cbdccb30c23f71f20d05b19256232419e7c5e517
  Author: Guozhi Wei <carrot at google.com>
  Date:   2023-09-15 (Fri, 15 Sep 2023)

  Changed paths:
    M llvm/lib/CodeGen/RegAllocGreedy.cpp
    M llvm/lib/CodeGen/RegAllocGreedy.h
    M llvm/test/CodeGen/AArch64/cgp-usubo.ll
    M llvm/test/CodeGen/AArch64/csr-split.ll
    M llvm/test/CodeGen/AMDGPU/blender-no-live-segment-at-def-implicit-def.ll
    M llvm/test/CodeGen/AMDGPU/greedy-alloc-fail-sgpr1024-spill.mir
    M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
    M llvm/test/CodeGen/AMDGPU/ran-out-of-sgprs-allocation-failure.mir
    M llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
    M llvm/test/CodeGen/ARM/csr-split.ll
    M llvm/test/CodeGen/ARM/divmod-eabi.ll
    M llvm/test/CodeGen/ARM/thumb2-size-opt.ll
    M llvm/test/CodeGen/AVR/cttz.ll
    M llvm/test/CodeGen/Hexagon/noreturn-noepilog.ll
    M llvm/test/CodeGen/PowerPC/csr-split.ll
    M llvm/test/CodeGen/PowerPC/ppc64-rop-protection-aix.ll
    M llvm/test/CodeGen/PowerPC/ppc64-rop-protection.ll
    M llvm/test/CodeGen/PowerPC/subreg-postra.ll
    M llvm/test/CodeGen/PowerPC/tail-dup-break-cfg.ll
    M llvm/test/CodeGen/PowerPC/tls-cse.ll
    M llvm/test/CodeGen/RISCV/double-stack-spill-restore.ll
    M llvm/test/CodeGen/RISCV/fmax-fmin.ll
    M llvm/test/CodeGen/RISCV/overflow-intrinsics.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-vpload.ll
    M llvm/test/CodeGen/RISCV/rvv/strided-vpload.ll
    M llvm/test/CodeGen/Thumb2/pacbti-m-outliner-3.ll
    M llvm/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll
    M llvm/test/CodeGen/X86/cgp-usubo.ll
    M llvm/test/CodeGen/X86/csr-split.ll
    M llvm/test/CodeGen/X86/ragreedy-bug.ll
    M llvm/test/CodeGen/X86/ragreedy-hoist-spill.ll
    M llvm/test/CodeGen/X86/speculative-load-hardening.ll
    A llvm/test/CodeGen/X86/split-reg-with-hint.ll
    M llvm/test/CodeGen/X86/statepoint-call-lowering.ll
    M llvm/test/CodeGen/X86/statepoint-invoke-ra-enter-at-end.mir
    M llvm/test/CodeGen/X86/statepoint-ra.ll
    M llvm/test/CodeGen/X86/statepoint-vreg-details.ll
    M llvm/test/CodeGen/X86/statepoint-vreg.ll
    M llvm/test/DebugInfo/ARM/sdag-split-arg.ll
    M llvm/test/DebugInfo/X86/live-debug-values.ll
    M llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbolize-operands.ll

  Log Message:
  -----------
  [RA] Split a virtual register in cold blocks if it is not assigned preferred physical register

If a virtual register is not assigned preferred physical register, it means some
COPY instructions will be changed to real register move instructions. In this
case we can try to split the virtual register in colder blocks, if success, the
original COPY instructions can be deleted, and the new COPY instructions in
colder blocks will be generated as register move instructions. It results in
fewer dynamic register move instructions executed.

The new test case split-reg-with-hint.ll gives an example, the hot path contains
24 instructions without this patch, now it is only 4 instructions with this
patch.

Differential Revision: https://reviews.llvm.org/D156491