[all-commits] [llvm/llvm-project] 52b33f: [RISCV] Avoid toggling VL for hidden splat case in...

[Philip Reames via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 52b33ff760b01e73dc4a0960f97812f9effe18f3
      https://github.com/llvm/llvm-project/commit/52b33ff760b01e73dc4a0960f97812f9effe18f3
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2023-09-15 (Fri, 15 Sep 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll

  Log Message:
  -----------
  [RISCV] Avoid toggling VL for hidden splat case in constant buildvector lowering

We have the analogous case in the single insert path.  The reasoning here is that if the original VL fits in LMUL1, we'd prefer to clobber a few extra dead lanes than to force two VL toggles.  VTYPE toggles are generally cheaper than VL toggles.