[all-commits] [llvm/llvm-project] 0a1aa6: [NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFil...

Arthur Eubanks via All-commits all-commits at lists.llvm.org
Thu Sep 14 14:10:28 PDT 2023 

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0a1aa6cda2758b0926a95f87d39ffefb1cb90200
      https://github.com/llvm/llvm-project/commit/0a1aa6cda2758b0926a95f87d39ffefb1cb90200
  Author: Arthur Eubanks <aeubanks at google.com>
  Date:   2023-09-14 (Thu, 14 Sep 2023)

  Changed paths:
    M clang/lib/CodeGen/BackendUtil.cpp
    M clang/lib/Frontend/CompilerInvocation.cpp
    M clang/lib/Interpreter/DeviceOffload.cpp
    M clang/tools/clang-fuzzer/handle-llvm/handle_llvm.cpp
    M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
    M flang/lib/Frontend/CompilerInvocation.cpp
    M flang/lib/Frontend/FrontendActions.cpp
    M lld/COFF/LTO.cpp
    M lld/ELF/Config.h
    M lld/ELF/LTO.cpp
    M lld/MachO/Config.h
    M lld/wasm/Config.h
    M lldb/source/Expression/IRExecutionUnit.cpp
    M llvm/docs/OptBisect.rst
    M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl08.rst
    M llvm/examples/Kaleidoscope/Chapter8/toy.cpp
    M llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
    M llvm/include/llvm/CodeGen/GlobalISel/CSEInfo.h
    M llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h
    M llvm/include/llvm/CodeGen/GlobalISel/InstructionSelect.h
    M llvm/include/llvm/CodeGen/LinkAllCodegenComponents.h
    M llvm/include/llvm/CodeGen/ParallelCG.h
    M llvm/include/llvm/CodeGen/Passes.h
    M llvm/include/llvm/CodeGen/SchedulerRegistry.h
    M llvm/include/llvm/CodeGen/SelectionDAG.h
    M llvm/include/llvm/CodeGen/SelectionDAGISel.h
    M llvm/include/llvm/CodeGen/SelectionDAGTargetInfo.h
    M llvm/include/llvm/CodeGen/TargetInstrInfo.h
    M llvm/include/llvm/CodeGen/TargetLowering.h
    M llvm/include/llvm/CodeGen/TargetPassConfig.h
    M llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
    M llvm/include/llvm/ExecutionEngine/ExecutionEngine.h
    M llvm/include/llvm/ExecutionEngine/Orc/JITTargetMachineBuilder.h
    M llvm/include/llvm/LTO/Config.h
    M llvm/include/llvm/LTO/legacy/LTOCodeGenerator.h
    M llvm/include/llvm/LTO/legacy/ThinLTOCodeGenerator.h
    M llvm/include/llvm/MC/TargetRegistry.h
    M llvm/include/llvm/Support/CodeGen.h
    M llvm/include/llvm/Target/TargetMachine.h
    M llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
    M llvm/lib/CodeGen/CommandFlags.cpp
    M llvm/lib/CodeGen/DwarfEHPrepare.cpp
    M llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp
    M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
    M llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
    M llvm/lib/CodeGen/LLVMTargetMachine.cpp
    M llvm/lib/CodeGen/MachineBlockPlacement.cpp
    M llvm/lib/CodeGen/MachineFunction.cpp
    M llvm/lib/CodeGen/PostRASchedulerList.cpp
    M llvm/lib/CodeGen/PrologEpilogInserter.cpp
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
    M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
    M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGVLIW.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
    M llvm/lib/CodeGen/SwitchLoweringUtils.cpp
    M llvm/lib/CodeGen/TargetPassConfig.cpp
    M llvm/lib/CodeGen/TargetSubtargetInfo.cpp
    M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
    M llvm/lib/ExecutionEngine/ExecutionEngine.cpp
    M llvm/lib/ExecutionEngine/ExecutionEngineBindings.cpp
    M llvm/lib/ExecutionEngine/Orc/JITTargetMachineBuilder.cpp
    M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
    M llvm/lib/LTO/LTO.cpp
    M llvm/lib/LTO/LTOCodeGenerator.cpp
    M llvm/lib/LTO/ThinLTOCodeGenerator.cpp
    M llvm/lib/Target/AArch64/AArch64.h
    M llvm/lib/Target/AArch64/AArch64FastISel.cpp
    M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.h
    M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
    M llvm/lib/Target/AArch64/AArch64InstrInfo.h
    M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
    M llvm/lib/Target/AArch64/AArch64TargetMachine.h
    M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
    M llvm/lib/Target/AMDGPU/AMDGPU.h
    M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp
    M llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
    M llvm/lib/Target/AMDGPU/R600.h
    M llvm/lib/Target/AMDGPU/R600ISelDAGToDAG.cpp
    M llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
    M llvm/lib/Target/AMDGPU/R600TargetMachine.h
    M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
    M llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
    M llvm/lib/Target/ARC/ARC.h
    M llvm/lib/Target/ARC/ARCISelDAGToDAG.cpp
    M llvm/lib/Target/ARC/ARCTargetMachine.cpp
    M llvm/lib/Target/ARC/ARCTargetMachine.h
    M llvm/lib/Target/ARM/ARM.h
    M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
    M llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
    M llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
    M llvm/lib/Target/ARM/ARMISelLowering.cpp
    M llvm/lib/Target/ARM/ARMTargetMachine.cpp
    M llvm/lib/Target/ARM/ARMTargetMachine.h
    M llvm/lib/Target/AVR/AVR.h
    M llvm/lib/Target/AVR/AVRISelDAGToDAG.cpp
    M llvm/lib/Target/AVR/AVRTargetMachine.cpp
    M llvm/lib/Target/AVR/AVRTargetMachine.h
    M llvm/lib/Target/BPF/BPFTargetMachine.cpp
    M llvm/lib/Target/BPF/BPFTargetMachine.h
    M llvm/lib/Target/CSKY/CSKY.h
    M llvm/lib/Target/CSKY/CSKYISelDAGToDAG.cpp
    M llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
    M llvm/lib/Target/CSKY/CSKYTargetMachine.h
    M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
    M llvm/lib/Target/DirectX/DirectXTargetMachine.h
    M llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp
    M llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
    M llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
    M llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.h
    M llvm/lib/Target/Hexagon/HexagonSubtarget.cpp
    M llvm/lib/Target/Hexagon/HexagonSubtarget.h
    M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
    M llvm/lib/Target/Hexagon/HexagonTargetMachine.h
    M llvm/lib/Target/Lanai/LanaiSubtarget.cpp
    M llvm/lib/Target/Lanai/LanaiSubtarget.h
    M llvm/lib/Target/Lanai/LanaiTargetMachine.cpp
    M llvm/lib/Target/Lanai/LanaiTargetMachine.h
    M llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
    M llvm/lib/Target/LoongArch/LoongArchTargetMachine.h
    M llvm/lib/Target/M68k/M68kISelDAGToDAG.cpp
    M llvm/lib/Target/M68k/M68kTargetMachine.cpp
    M llvm/lib/Target/M68k/M68kTargetMachine.h
    M llvm/lib/Target/MSP430/MSP430.h
    M llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
    M llvm/lib/Target/MSP430/MSP430TargetMachine.cpp
    M llvm/lib/Target/MSP430/MSP430TargetMachine.h
    M llvm/lib/Target/Mips/Mips16ISelDAGToDAG.cpp
    M llvm/lib/Target/Mips/Mips16ISelDAGToDAG.h
    M llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
    M llvm/lib/Target/Mips/MipsISelDAGToDAG.h
    M llvm/lib/Target/Mips/MipsPostLegalizerCombiner.cpp
    M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
    M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.h
    M llvm/lib/Target/Mips/MipsSubtarget.cpp
    M llvm/lib/Target/Mips/MipsSubtarget.h
    M llvm/lib/Target/Mips/MipsTargetMachine.cpp
    M llvm/lib/Target/Mips/MipsTargetMachine.h
    M llvm/lib/Target/NVPTX/NVPTX.h
    M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
    M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
    M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
    M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
    M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
    M llvm/lib/Target/NVPTX/NVPTXTargetMachine.h
    M llvm/lib/Target/PowerPC/PPC.h
    M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
    M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
    M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
    M llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
    M llvm/lib/Target/PowerPC/PPCTargetMachine.h
    M llvm/lib/Target/RISCV/RISCV.h
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
    M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
    M llvm/lib/Target/RISCV/RISCVTargetMachine.h
    M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
    M llvm/lib/Target/SPIRV/SPIRVTargetMachine.h
    M llvm/lib/Target/Sparc/SparcTargetMachine.cpp
    M llvm/lib/Target/Sparc/SparcTargetMachine.h
    M llvm/lib/Target/SystemZ/SystemZ.h
    M llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
    M llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
    M llvm/lib/Target/SystemZ/SystemZTargetMachine.h
    M llvm/lib/Target/TargetMachine.cpp
    M llvm/lib/Target/TargetMachineC.cpp
    M llvm/lib/Target/VE/VETargetMachine.cpp
    M llvm/lib/Target/VE/VETargetMachine.h
    M llvm/lib/Target/WebAssembly/WebAssembly.h
    M llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
    M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
    M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h
    M llvm/lib/Target/X86/X86.h
    M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/lib/Target/X86/X86LowerAMXIntrinsics.cpp
    M llvm/lib/Target/X86/X86LowerAMXType.cpp
    M llvm/lib/Target/X86/X86PreAMXConfig.cpp
    M llvm/lib/Target/X86/X86SpeculativeExecutionSideEffectSuppression.cpp
    M llvm/lib/Target/X86/X86TargetMachine.cpp
    M llvm/lib/Target/X86/X86TargetMachine.h
    M llvm/lib/Target/XCore/XCore.h
    M llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp
    M llvm/lib/Target/XCore/XCoreTargetMachine.cpp
    M llvm/lib/Target/XCore/XCoreTargetMachine.h
    M llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
    M llvm/lib/Target/Xtensa/XtensaTargetMachine.h
    M llvm/tools/gold/gold-plugin.cpp
    M llvm/tools/llc/llc.cpp
    M llvm/tools/lli/lli.cpp
    M llvm/tools/llvm-exegesis/lib/Assembler.cpp
    M llvm/tools/llvm-isel-fuzzer/llvm-isel-fuzzer.cpp
    M llvm/tools/llvm-opt-fuzzer/llvm-opt-fuzzer.cpp
    M llvm/tools/llvm-reduce/ReducerWorkItem.cpp
    M llvm/tools/lto/lto.cpp
    M llvm/tools/opt/opt.cpp
    M llvm/unittests/CodeGen/AArch64SelectionDAGTest.cpp
    M llvm/unittests/CodeGen/AMDGPUMetadataTest.cpp
    M llvm/unittests/CodeGen/GlobalISel/GISelMITest.cpp
    M llvm/unittests/CodeGen/InstrRefLDVTest.cpp
    M llvm/unittests/CodeGen/MFCommon.inc
    M llvm/unittests/CodeGen/SelectionDAGAddressAnalysisTest.cpp
    M llvm/unittests/CodeGen/TargetOptionsTest.cpp
    M llvm/unittests/ExecutionEngine/MCJIT/MCJITTestBase.h
    M llvm/unittests/ExecutionEngine/Orc/JITTargetMachineBuilderTest.cpp
    M llvm/unittests/MI/LiveIntervalTest.cpp
    M llvm/unittests/Target/AArch64/AArch64SVESchedPseudoTest.cpp
    M llvm/unittests/Target/AArch64/AddressingModes.cpp
    M llvm/unittests/Target/AArch64/InstSizes.cpp
    M llvm/unittests/Target/AArch64/MatrixRegisterAliasing.cpp
    M llvm/unittests/Target/ARM/InstSizes.cpp
    M llvm/unittests/Target/ARM/MachineInstrTest.cpp
    M llvm/unittests/Target/LoongArch/InstSizes.cpp
    M llvm/unittests/Target/PowerPC/AIXRelocModelTest.cpp
    M llvm/unittests/Target/WebAssembly/WebAssemblyExceptionInfoTest.cpp
    M llvm/unittests/Target/X86/MachineSizeOptsTest.cpp
    M llvm/unittests/Target/X86/TernlogTest.cpp
    M mlir/include/mlir/ExecutionEngine/ExecutionEngine.h
    M mlir/lib/CAPI/ExecutionEngine/ExecutionEngine.cpp
    M mlir/lib/Dialect/GPU/Transforms/SerializeToBlob.cpp
    M mlir/lib/ExecutionEngine/JitRunner.cpp
    M mlir/lib/Target/LLVM/ModuleToObject.cpp
    M openmp/libomptarget/plugins-nextgen/common/PluginInterface/JIT.cpp

  Log Message:
  -----------
  [NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)

This will make it easy for callers to see issues with and fix up calls
to createTargetMachine after a future change to the params of
TargetMachine.

This matches other nearby enums.

For downstream users, this should be a fairly straightforward
replacement,
e.g. s/CodeGenOpt::Aggressive/CodeGenOptLevel::Aggressive
or s/CGFT_/CodeGenFileType::

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