[all-commits] [llvm/llvm-project] 4a8312: [mlir][vector] Rename vector reductions: `maxf` → ...

[Daniil Dudkin via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4a831250b871d5fbd5c6923fec4a492ec35f4b12
      https://github.com/llvm/llvm-project/commit/4a831250b871d5fbd5c6923fec4a492ec35f4b12
  Author: Daniil Dudkin <unterumarmung at yandex.ru>
  Date:   2023-09-13 (Wed, 13 Sep 2023)

  Changed paths:
    M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
    M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
    M mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
    M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
    M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
    M mlir/lib/Dialect/Vector/Transforms/LowerVectorContract.cpp
    M mlir/lib/Dialect/Vector/Transforms/LowerVectorScan.cpp
    M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
    M mlir/test/Conversion/VectorToSPIRV/vector-to-spirv.mlir
    M mlir/test/Dialect/Affine/SuperVectorize/vectorize_reduction.mlir
    M mlir/test/Dialect/Linalg/vectorization.mlir
    M mlir/test/Dialect/Vector/canonicalize.mlir
    M mlir/test/Dialect/Vector/ops.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f32-reassoc.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f32.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f64-reassoc.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f64.mlir

  Log Message:
  -----------
  [mlir][vector] Rename vector reductions: `maxf` → `maximumf`, `minf` → `minimumf`

This patch is part of a larger initiative aimed at fixing floating-point `max` and `min` operations in MLIR: https://discourse.llvm.org/t/rfc-fix-floating-point-max-and-min-operations-in-mlir/72671.

Here, we are addressing task 2.1 from the plan, which involves renaming the vector reductions to align with the semantics of the corresponding LLVM intrinsics.

Reviewed By: dcaballe

Differential Revision: https://reviews.llvm.org/D158618


  Commit: 709b27427b4661bdd08fe80b0164acf53c895793
      https://github.com/llvm/llvm-project/commit/709b27427b4661bdd08fe80b0164acf53c895793
  Author: Daniil Dudkin <unterumarmung at yandex.ru>
  Date:   2023-09-13 (Wed, 13 Sep 2023)

  Changed paths:
    M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
    M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f32-reassoc.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f32.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f64-reassoc.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f64.mlir

  Log Message:
  -----------
  [mlir][vector] Bring back `maxf`/`minf` reductions

This patch is part of a larger initiative aimed at fixing floating-point `max` and `min` operations in MLIR: https://discourse.llvm.org/t/rfc-fix-floating-point-max-and-min-operations-in-mlir/72671.

In line with the mentioned RFC, this patch  tackles tasks 2.3 and 2.4.
It adds LLVM conversions for the `maxf`/`minf` reductions to the non-NaN-propagating LLVM intrinsics.

Depends on D158618

Reviewed By: dcaballe

Differential Revision: https://reviews.llvm.org/D158659


  Commit: 8f5d519458aaf8ca7731ee974b912f6897078282
      https://github.com/llvm/llvm-project/commit/8f5d519458aaf8ca7731ee974b912f6897078282
  Author: Daniil Dudkin <unterumarmung at yandex.ru>
  Date:   2023-09-13 (Wed, 13 Sep 2023)

  Changed paths:
    M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
    M mlir/test/Conversion/VectorToLLVM/vector-reduction-to-llvm.mlir

  Log Message:
  -----------
  [mlir][vector] Implement Workaround Lowerings for Masked `fm**imum` Reductions

This patch is part of a larger initiative aimed at fixing floating-point `max` and `min` operations in MLIR: https://discourse.llvm.org/t/rfc-fix-floating-point-max-and-min-operations-in-mlir/72671.

Within LLVM, there are no masked reduction counterparts for vector reductions such as `fmaximum` and `fminimum`.
More information can be found here: https://github.com/llvm/llvm-project/issues/64940#issuecomment-1690694156.

To address this issue in MLIR, where we need to generate appropriate lowerings for these cases, we employ regular non-masked intrinsics.
However, we modify the input vector using the `arith.select` operation to effectively deactivate undesired elements using a "neutral mask value".
The neutral mask value is the smallest possible value for the `fmaximum` reduction and the largest possible value for the `fminimum` reduction.

Depends on D158618

Reviewed By: dcaballe

Differential Revision: https://reviews.llvm.org/D158773


Compare: https://github.com/llvm/llvm-project/compare/8ddedbf2f878...8f5d519458aa