[all-commits] [llvm/llvm-project] 8b4791: [X86] SimplifyMultipleUseDemandedBitsForTargetNode...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 8b479136c9ede8b7db00b6eeead5421f49cddb43
      https://github.com/llvm/llvm-project/commit/8b479136c9ede8b7db00b6eeead5421f49cddb43
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2023-09-13 (Wed, 13 Sep 2023)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/vec_int_to_fp.ll

  Log Message:
  -----------
  [X86] SimplifyMultipleUseDemandedBitsForTargetNode - add X86ISD::BLENDV handling

If we know the condition mask sign bit of the demanded elements then we can directly return the LHS/RHS selection