[all-commits] [llvm/llvm-project] ee31ba: [AArch64][SME]Update intrinsic interface for ld1/s...

[CarolineConcatto via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ee31ba0dd923c3a4628cf3887e137843e43c8b22
      https://github.com/llvm/llvm-project/commit/ee31ba0dd923c3a4628cf3887e137843e43c8b22
  Author: CarolineConcatto <51754594+CarolineConcatto at users.noreply.github.com>
  Date:   2023-09-13 (Wed, 13 Sep 2023)

  Changed paths:
    M clang/include/clang/Basic/arm_sme.td
    M clang/lib/CodeGen/CGBuiltin.cpp
    M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ld1.c
    M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ld1_vnum.c
    M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_st1.c
    M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_st1_vnum.c
    M clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp
    M clang/test/Sema/aarch64-sme-intrinsics/acle_sme_target.c

  Log Message:
  -----------
  [AArch64][SME]Update intrinsic interface for ld1/st1 (#65582)

The new ACLE PR#225[1] now combines the slice parameters for some
builtins. 
Slice specifies the ZA slice number directly and needs to be explicity
implemented by the "user" with the base register plus the immediate
offset

[1]https://github.com/ARM-software/acle/pull/225/files