[all-commits] [llvm/llvm-project] e1f224: [4/8][RISCV] Add rounding mode control variant for...

[Yueh-Ting (eop) Chen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e1f224a647e6296e61974ac59fdd61ada5afc820
      https://github.com/llvm/llvm-project/commit/e1f224a647e6296e61974ac59fdd61ada5afc820
  Author: eopXD <yueh.ting.chen at gmail.com>
  Date:   2023-07-13 (Thu, 13 Jul 2023)

  Changed paths:
    M clang/include/clang/Basic/riscv_vector.td
    M clang/lib/Sema/SemaChecking.cpp
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmacc.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmadd.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmsac.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmsub.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfnmacc.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfnmadd.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfnmsac.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfnmsub.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfmacc.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfmadd.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfmsac.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfmsub.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfnmacc.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfnmadd.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfnmsac.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfnmsub.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmacc.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmadd.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmsac.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmsub.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfnmacc.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfnmadd.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfnmsac.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfnmsub.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfmacc.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfmadd.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfmsac.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfmsub.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfnmacc.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfnmadd.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfnmsac.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfnmsub.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vfmacc-out-of-range.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vfmadd-out-of-range.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vfmsac-out-of-range.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vfmsub-out-of-range.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vfnmacc-out-of-range.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vfnmadd-out-of-range.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vfnmsac-out-of-range.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vfnmsub-out-of-range.c
    M llvm/include/llvm/IR/IntrinsicsRISCV.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
    M llvm/test/CodeGen/RISCV/rvv/masked-tama.ll
    M llvm/test/CodeGen/RISCV/rvv/masked-tamu.ll
    M llvm/test/CodeGen/RISCV/rvv/masked-tuma.ll
    M llvm/test/CodeGen/RISCV/rvv/masked-tumu.ll
    M llvm/test/CodeGen/RISCV/rvv/unmasked-ta.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmacc.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmadd.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmsac.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmsub.ll
    M llvm/test/CodeGen/RISCV/rvv/vfnmacc.ll
    M llvm/test/CodeGen/RISCV/rvv/vfnmadd.ll
    M llvm/test/CodeGen/RISCV/rvv/vfnmsac.ll
    M llvm/test/CodeGen/RISCV/rvv/vfnmsub.ll
    M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll

  Log Message:
  -----------
  [4/8][RISCV] Add rounding mode control variant for vfmacc, vfnmacc, vfmsac, vfnmsac, vfmadd, vfnmadd, vfmsub, vfnmsub

Depends on D154631

For the cover letter of the patch-set, please checkout D154628.

This is the 4th patch of the patch-set.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D154632