[all-commits] [llvm/llvm-project] 54cf69: AMDGPU: Use module flag to get code object version...

Thu Feb 2 18:58:26 PST 2023

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 54cf69c9d54e8a6dda40112489b52d05f2c946f3
      https://github.com/llvm/llvm-project/commit/54cf69c9d54e8a6dda40112489b52d05f2c946f3
  Author: Changpeng Fang <changpeng.fang at amd.com>
  Date:   2023-02-02 (Thu, 02 Feb 2023)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
    M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.h
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULowerKernelAttributes.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
    M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
    M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
    M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
    M llvm/test/CodeGen/AMDGPU/GlobalISel/implicit-kernarg-backend-usage-global-isel.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.dispatch.id.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.dispatch.ptr.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.kernarg.segment.ptr.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.queue.ptr.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workgroup.id.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll
    M llvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll
    M llvm/test/CodeGen/AMDGPU/addrspacecast.ll
    M llvm/test/CodeGen/AMDGPU/amdgpu.private-memory.ll
    M llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size-v3.ll
    M llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size.ll
    M llvm/test/CodeGen/AMDGPU/call-graph-register-usage.ll
    M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs.ll
    M llvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
    M llvm/test/CodeGen/AMDGPU/elf-notes.ll
    M llvm/test/CodeGen/AMDGPU/enable-scratch-only-dynamic-stack.ll
    M llvm/test/CodeGen/AMDGPU/flat-for-global-subtarget-feature.ll
    M llvm/test/CodeGen/AMDGPU/flat-scratch-reg.ll
    M llvm/test/CodeGen/AMDGPU/gfx902-without-xnack.ll
    M llvm/test/CodeGen/AMDGPU/hsa-default-device.ll
    M llvm/test/CodeGen/AMDGPU/hsa-fp-mode.ll
    M llvm/test/CodeGen/AMDGPU/hsa-func.ll
    M llvm/test/CodeGen/AMDGPU/hsa-metadata-deduce-ro-arg.ll
    M llvm/test/CodeGen/AMDGPU/hsa-metadata-enqueue-kernel-v3.ll
    M llvm/test/CodeGen/AMDGPU/hsa-metadata-enqueue-kernel.ll
    M llvm/test/CodeGen/AMDGPU/hsa-metadata-from-llvm-ctor-dtor-list.ll
    M llvm/test/CodeGen/AMDGPU/hsa-metadata-from-llvm-ir-full-v3.ll
    M llvm/test/CodeGen/AMDGPU/hsa-metadata-from-llvm-ir-full.ll
    M llvm/test/CodeGen/AMDGPU/hsa-metadata-heap-v5.ll
    M llvm/test/CodeGen/AMDGPU/hsa-metadata-hidden-args-v3.ll
    M llvm/test/CodeGen/AMDGPU/hsa-metadata-hidden-args-v5.ll
    M llvm/test/CodeGen/AMDGPU/hsa-metadata-hidden-args.ll
    M llvm/test/CodeGen/AMDGPU/hsa-metadata-hostcall-present-v3-asan.ll
    M llvm/test/CodeGen/AMDGPU/hsa-metadata-hostcall-v3.ll
    M llvm/test/CodeGen/AMDGPU/hsa-metadata-hostcall-v5.ll
    M llvm/test/CodeGen/AMDGPU/hsa-metadata-images-v3.ll
    M llvm/test/CodeGen/AMDGPU/hsa-metadata-images.ll
    M llvm/test/CodeGen/AMDGPU/hsa-metadata-invalid-ocl-version-1-v3.ll
    M llvm/test/CodeGen/AMDGPU/hsa-metadata-invalid-ocl-version-1.ll
    M llvm/test/CodeGen/AMDGPU/hsa-metadata-invalid-ocl-version-2-v3.ll
    M llvm/test/CodeGen/AMDGPU/hsa-metadata-invalid-ocl-version-2.ll
    M llvm/test/CodeGen/AMDGPU/hsa-metadata-invalid-ocl-version-3-v3.ll
    M llvm/test/CodeGen/AMDGPU/hsa-metadata-invalid-ocl-version-3.ll
    M llvm/test/CodeGen/AMDGPU/hsa-metadata-kernel-code-props-v3.ll
    M llvm/test/CodeGen/AMDGPU/hsa-metadata-kernel-code-props.ll
    M llvm/test/CodeGen/AMDGPU/hsa-metadata-multigrid-sync-arg-v5.ll
    M llvm/test/CodeGen/AMDGPU/hsa-metadata-queue-ptr-v5.ll
    M llvm/test/CodeGen/AMDGPU/hsa-metadata-queueptr-v5.ll
    M llvm/test/CodeGen/AMDGPU/hsa-metadata-resource-usage-function-ordering.ll
    M llvm/test/CodeGen/AMDGPU/hsa-metadata-uniform-workgroup-size-v5.ll
    M llvm/test/CodeGen/AMDGPU/hsa-metadata-workgroup-processor-mode-v5.ll
    M llvm/test/CodeGen/AMDGPU/hsa-note-no-func.ll
    M llvm/test/CodeGen/AMDGPU/hsa.ll
    M llvm/test/CodeGen/AMDGPU/implicit-arg-v5-opt.ll
    M llvm/test/CodeGen/AMDGPU/implicit-kernarg-backend-usage.ll
    M llvm/test/CodeGen/AMDGPU/implicit-kernel-argument-alignment.ll
    M llvm/test/CodeGen/AMDGPU/implicitarg-offset-attributes.ll
    M llvm/test/CodeGen/AMDGPU/indirect-call.ll
    M llvm/test/CodeGen/AMDGPU/kernarg-size.ll
    M llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll
    M llvm/test/CodeGen/AMDGPU/large-alloca-compute.ll
    M llvm/test/CodeGen/AMDGPU/lds-alignment.ll
    M llvm/test/CodeGen/AMDGPU/lds-size.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dispatch.id.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dispatch.ptr.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.implicitarg.ptr.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kernarg.segment.ptr.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.queue.ptr.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.workgroup.id.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.workitem.id.ll
    M llvm/test/CodeGen/AMDGPU/no-hsa-graphics-shaders.ll
    M llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll
    M llvm/test/CodeGen/AMDGPU/nop-data.ll
    M llvm/test/CodeGen/AMDGPU/private-element-size.ll
    M llvm/test/CodeGen/AMDGPU/promote-alloca-no-opts.ll
    M llvm/test/CodeGen/AMDGPU/promote-alloca-padding-size-estimate.ll
    M llvm/test/CodeGen/AMDGPU/recursion.ll
    M llvm/test/CodeGen/AMDGPU/resource-usage-dead-function.ll
    M llvm/test/CodeGen/AMDGPU/stack-realign-kernel.ll
    M llvm/test/CodeGen/AMDGPU/tid-code-object-v2-backwards-compatibility.ll
    M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-any.ll
    M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-not-supported.ll
    M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-off.ll
    M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-on.ll
    M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-off-1.ll
    M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-off-2.ll
    M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-on-1.ll
    M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-on-2.ll
    M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-invalid-any-off-on.ll
    M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-any.ll
    M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-not-supported.ll
    M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-off.ll
    M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-on.ll
    M llvm/test/CodeGen/AMDGPU/trap-abis.ll
    M llvm/test/CodeGen/AMDGPU/trap.ll
    A llvm/test/CodeGen/AMDGPU/unsupported-code-object-version.ll
    M llvm/test/CodeGen/AMDGPU/vgpr-spill-emergency-stack-slot-compute.ll

  Log Message:
  -----------
  AMDGPU: Use module flag to get code object version at IR level

Summary:
  This patch introduces a mechanism to check the code object version from the module flag, This avoids checking from command line.
In case the module flag is missing, we use the current default code object version supported in the compiler.

For tools whose inputs are not IR, we may need other approach (directive, for example) to check the code
object version, That will be in a separate patch later.

For LIT tests update, we directly add module flag if there is only a single code object version associated with all checks in one file.
In cause of multiple code object version in one file, we use the "sed" method to "clone" the checks to achieve the goal.

Reviewer: arsenm

Differential Revision:
  https://reviews.llvm.org/D14313