[all-commits] [llvm/llvm-project] c86f8d: [PowerPC] Don't crash when disassembling invalid i...

[Nemanja Ivanovic via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c86f8d4276aee8956711829e49c9969cd0223590
      https://github.com/llvm/llvm-project/commit/c86f8d4276aee8956711829e49c9969cd0223590
  Author: Nemanja Ivanovic <nemanja.i.ibm at gmail.com>
  Date:   2023-02-02 (Thu, 02 Feb 2023)

  Changed paths:
    M llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
    M llvm/lib/Target/PowerPC/PPCRegisterInfo.td
    M llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-ISA31-invalid.txt

  Log Message:
  -----------
  [PowerPC] Don't crash when disassembling invalid immediate

There is an assert in the disassembler functions to ensure
that the immediate is the appropriate width. However,
sometimes what is being disassembled is not instructions
but data that happens to have the bit pattern of an existing
instruction but invalid operands. It is valid for such
things to exist in the text section so we don't want
to crash when disassembling such a thing.

This patch removes the asserts and produces a disassembler
failure for such cases.