[all-commits] [llvm/llvm-project] 35b8bb: [RISC-V][HWASAN] Don't explicitly load GOT entry t...

[Alex via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 35b8bb0ab3af4cc60c14a499342ab92620059d18
      https://github.com/llvm/llvm-project/commit/35b8bb0ab3af4cc60c14a499342ab92620059d18
  Author: Alexey Baturo <baturo.alexey at gmail.com>
  Date:   2023-01-09 (Mon, 09 Jan 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
    M llvm/test/CodeGen/RISCV/hwasan-check-memaccess.ll

  Log Message:
  -----------
  [RISC-V][HWASAN] Don't explicitly load GOT entry to call hwasan mismatch routine

Reviewed by: luismarques

Differential Revision: https://reviews.llvm.org/D132994