[all-commits] [llvm/llvm-project] 69e75a: CodeGen: Don't lazily construct MachineFunctionInfo

Wed Dec 21 07:50:41 PST 2022

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 69e75ae695d9ef1360a2a1fbefd6e0e0456c3f7b
      https://github.com/llvm/llvm-project/commit/69e75ae695d9ef1360a2a1fbefd6e0e0456c3f7b
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2022-12-21 (Wed, 21 Dec 2022)

  Changed paths:
    M llvm/include/llvm/CodeGen/MachineFunction.h
    M llvm/include/llvm/Target/TargetMachine.h
    M llvm/lib/CodeGen/MachineFunction.cpp
    M llvm/lib/CodeGen/MachineModuleInfo.cpp
    M llvm/lib/CodeGen/ResetMachineFunctionPass.cpp
    M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
    M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
    M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
    M llvm/lib/Target/AArch64/AArch64TargetMachine.h
    M llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.h
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
    M llvm/lib/Target/AMDGPU/R600MachineFunctionInfo.cpp
    M llvm/lib/Target/AMDGPU/R600MachineFunctionInfo.h
    M llvm/lib/Target/AMDGPU/R600TargetMachine.h
    M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
    M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
    M llvm/lib/Target/ARC/ARCMachineFunctionInfo.h
    M llvm/lib/Target/ARC/ARCTargetMachine.cpp
    M llvm/lib/Target/ARM/ARMMachineFunctionInfo.cpp
    M llvm/lib/Target/ARM/ARMMachineFunctionInfo.h
    M llvm/lib/Target/ARM/ARMTargetMachine.cpp
    M llvm/lib/Target/ARM/ARMTargetMachine.h
    M llvm/lib/Target/AVR/AVRMachineFunctionInfo.h
    M llvm/lib/Target/AVR/AVRTargetMachine.cpp
    M llvm/lib/Target/AVR/AVRTargetMachine.h
    M llvm/lib/Target/CSKY/CSKYMachineFunctionInfo.h
    M llvm/lib/Target/Hexagon/HexagonMachineFunctionInfo.h
    M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
    M llvm/lib/Target/Hexagon/HexagonTargetMachine.h
    M llvm/lib/Target/Lanai/LanaiMachineFunctionInfo.h
    M llvm/lib/Target/Lanai/LanaiTargetMachine.cpp
    M llvm/lib/Target/Lanai/LanaiTargetMachine.h
    M llvm/lib/Target/LoongArch/LoongArchMachineFunctionInfo.h
    M llvm/lib/Target/MSP430/MSP430MachineFunctionInfo.h
    M llvm/lib/Target/MSP430/MSP430TargetMachine.cpp
    M llvm/lib/Target/MSP430/MSP430TargetMachine.h
    M llvm/lib/Target/Mips/MipsMachineFunction.h
    M llvm/lib/Target/Mips/MipsTargetMachine.cpp
    M llvm/lib/Target/Mips/MipsTargetMachine.h
    M llvm/lib/Target/NVPTX/NVPTXMachineFunctionInfo.h
    M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
    M llvm/lib/Target/NVPTX/NVPTXTargetMachine.h
    M llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.cpp
    M llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h
    M llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
    M llvm/lib/Target/PowerPC/PPCTargetMachine.h
    M llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h
    M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
    M llvm/lib/Target/RISCV/RISCVTargetMachine.h
    M llvm/lib/Target/Sparc/SparcMachineFunctionInfo.h
    M llvm/lib/Target/Sparc/SparcTargetMachine.cpp
    M llvm/lib/Target/Sparc/SparcTargetMachine.h
    M llvm/lib/Target/SystemZ/SystemZMachineFunctionInfo.h
    M llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
    M llvm/lib/Target/SystemZ/SystemZTargetMachine.h
    M llvm/lib/Target/VE/VEMachineFunctionInfo.h
    M llvm/lib/Target/VE/VETargetMachine.cpp
    M llvm/lib/Target/VE/VETargetMachine.h
    M llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h
    M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
    M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h
    M llvm/lib/Target/X86/X86MachineFunctionInfo.h
    M llvm/lib/Target/X86/X86TargetMachine.cpp
    M llvm/lib/Target/X86/X86TargetMachine.h
    M llvm/lib/Target/XCore/XCoreMachineFunctionInfo.h
    M llvm/lib/Target/XCore/XCoreTargetMachine.cpp
    M llvm/lib/Target/XCore/XCoreTargetMachine.h

  Log Message:
  -----------
  CodeGen: Don't lazily construct MachineFunctionInfo

This fixes what I consider to be an API flaw I've tripped over
multiple times. The point this is constructed isn't well defined, so
depending on where this is first called, you can conclude different
information based on the MachineFunction. For example, the AMDGPU
implementation inspected the MachineFrameInfo on construction for the
stack objects and if the frame has calls. This kind of worked in
SelectionDAG which visited all allocas up front, but broke in
GlobalISel which hasn't visited any of the IR when arguments are
lowered.

I've run into similar problems before with the MIR parser and trying
to make use of other MachineFunction fields, so I think it's best to
just categorically disallow dependency on the MachineFunction state in
the constructor and to always construct this at the same time as the
MachineFunction itself.

A missing feature I still could use is a way to access an custom
analysis pass on the IR here.

  Commit: d8fb46ee5555e73ab7a835b0098d0d7ee371c18b
      https://github.com/llvm/llvm-project/commit/d8fb46ee5555e73ab7a835b0098d0d7ee371c18b
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2022-12-21 (Wed, 21 Dec 2022)

  Changed paths:
    M llvm/test/tools/llvm-reduce/file-output-type.test

  Log Message:
  -----------
  llvm-reduce: Remove test dependence on registered targets

This reverts e4b126cc2d33033a5538d72a88f6aa153ac8b757 and
e57ab8fe91f06e71d3de2df07e6c7efd2f0c6078.

This previously depended on where the target happened to construct (or
not) the MachineFunctionInfo during the initial MIR construction. Now
that the MachineFunctionInfo is consistently constructed at
MachineFunction construction time, this should always work.

Compare: https://github.com/llvm/llvm-project/compare/7a7e9109a2d6...d8fb46ee5555