[all-commits] [llvm/llvm-project] cc4264: [AMDGPU][GFX7][DOC][NFC] Update assembler syntax d...

dpreobra via All-commits all-commits at lists.llvm.org
Tue Dec 13 02:51:12 PST 2022


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: cc426402bed6b576086357f36b21879bfe365939
      https://github.com/llvm/llvm-project/commit/cc426402bed6b576086357f36b21879bfe365939
  Author: Dmitry Preobrazhensky <dmitri.preobrazhenski at gmail.com>
  Date:   2022-12-13 (Tue, 13 Dec 2022)

  Changed paths:
    M llvm/docs/AMDGPU/AMDGPUAsmGFX7.rst
    M llvm/docs/AMDGPU/gfx7_hwreg.rst
    A llvm/docs/AMDGPU/gfx7_imm16_0533c2.rst
    A llvm/docs/AMDGPU/gfx7_imm16_169952.rst
    R llvm/docs/AMDGPU/gfx7_imm16_73139a.rst
    R llvm/docs/AMDGPU/gfx7_imm16_a04fb3.rst
    M llvm/docs/AMDGPU/gfx7_label.rst
    M llvm/docs/AMDGPU/gfx7_m.rst
    M llvm/docs/AMDGPU/gfx7_msg.rst
    R llvm/docs/AMDGPU/gfx7_sbase_010ce0.rst
    A llvm/docs/AMDGPU/gfx7_sbase_b0aa25.rst
    R llvm/docs/AMDGPU/gfx7_soffset_1bad09.rst
    A llvm/docs/AMDGPU/gfx7_soffset_67d76d.rst
    A llvm/docs/AMDGPU/gfx7_srsrc_80eef6.rst
    R llvm/docs/AMDGPU/gfx7_srsrc_e73d16.rst
    M llvm/docs/AMDGPU/gfx7_tgt.rst
    M llvm/docs/AMDGPU/gfx7_type_deviation.rst
    A llvm/docs/AMDGPU/gfx7_vaddr_887f26.rst
    R llvm/docs/AMDGPU/gfx7_vaddr_e9b690.rst
    A llvm/docs/AMDGPU/gfx7_vdata_2d6239.rst
    R llvm/docs/AMDGPU/gfx7_vdata_325b78.rst
    A llvm/docs/AMDGPU/gfx7_vdata_4b260e.rst
    R llvm/docs/AMDGPU/gfx7_vdata_4d8ecf.rst
    A llvm/docs/AMDGPU/gfx7_vdata_84fab6.rst
    R llvm/docs/AMDGPU/gfx7_vdata_87fb90.rst
    A llvm/docs/AMDGPU/gfx7_vdata_aa5a53.rst
    A llvm/docs/AMDGPU/gfx7_vdata_ad559c.rst
    R llvm/docs/AMDGPU/gfx7_vdata_b2a787.rst
    R llvm/docs/AMDGPU/gfx7_vdata_c61803.rst
    R llvm/docs/AMDGPU/gfx7_vdst_0c25a6.rst
    A llvm/docs/AMDGPU/gfx7_vdst_1f3009.rst
    R llvm/docs/AMDGPU/gfx7_vdst_3d7dcf.rst
    R llvm/docs/AMDGPU/gfx7_vdst_5d50a1.rst
    A llvm/docs/AMDGPU/gfx7_vdst_709347.rst
    A llvm/docs/AMDGPU/gfx7_vdst_81a6ed.rst
    A llvm/docs/AMDGPU/gfx7_vdst_d71f1c.rst
    A llvm/docs/AMDGPU/gfx7_vdst_dd8a32.rst
    A llvm/docs/AMDGPU/gfx7_vdst_dfa6da.rst
    R llvm/docs/AMDGPU/gfx7_vsrc_533a4e.rst
    A llvm/docs/AMDGPU/gfx7_vsrc_ba3116.rst
    M llvm/docs/AMDGPU/gfx7_waitcnt.rst

  Log Message:
  -----------
  [AMDGPU][GFX7][DOC][NFC] Update assembler syntax description

Summary of changes:
- Enable register tuples with 9, 10, 11 and 12 registers (https://reviews.llvm.org/D138205).
- Enable tfe modifier for MUBUF loads (https://reviews.llvm.org/D137783).
- Enable abs and neg modifiers for v_cndmask_b32_e64.
- Minor corrections and improvements.




More information about the All-commits mailing list