[all-commits] [llvm/llvm-project] d2e434: [RegisterCoalescer] fix dst subreg replacement dur...

[Afanasyev Ivan via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d2e434c378423477321d98f8b0224760d24c877a
      https://github.com/llvm/llvm-project/commit/d2e434c378423477321d98f8b0224760d24c877a
  Author: Afanasyev Ivan <ivafanas at gmail.com>
  Date:   2022-09-23 (Fri, 23 Sep 2022)

  Changed paths:
    M llvm/lib/CodeGen/RegisterCoalescer.cpp

  Log Message:
  -----------
  [RegisterCoalescer] fix dst subreg replacement during remat copy trick

Instructions might use definition register as its "undef" operand. It
happens on architectures with predicated executon:

```
%0:subreg = instruction op_1, ..., op_N, undef %0:subreg, op_N+2, ...
```

RegisterCoalescer should take into account all remat instruction
operands during destination subregister fixup.

```
; remat result before fix:
%1 = instruction op_1, ..., op_N, undef %1:subreg, op_N+2, ...

; remat result after fix (correct):
%1 = instruction op_1, ..., op_N, undef %1, op_N+2, ...
```

Differential Revision: https://reviews.llvm.org/D125657