[all-commits] [llvm/llvm-project] 8b8e18: [RISCV] Replace RISCVISD::GREV/GORC/SHFL/UNSHFL wi...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 8b8e18e11fa6f57f8a7c6f1ad2df9adfb7b6a019
      https://github.com/llvm/llvm-project/commit/8b8e18e11fa6f57f8a7c6f1ad2df9adfb7b6a019
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-09-21 (Wed, 21 Sep 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.h
    M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td

  Log Message:
  -----------
  [RISCV] Replace RISCVISD::GREV/GORC/SHFL/UNSHFL with BREV8/ORC_B/ZIP/UNZIP.

With Zbp removed, we no longer need the generalized forms.

The computeKnownBitsForTargetNode code brev8/orc.b is still based
on the general form with the shift amount forced to 7.