[all-commits] [llvm/llvm-project] f6e7ad: [Hexagon] Revamp type legalization of ext/trunc/sa...

[Krzysztof Parzyszek via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f6e7ad56040ee8531be3375e04312d30700a58b2
      https://github.com/llvm/llvm-project/commit/f6e7ad56040ee8531be3375e04312d30700a58b2
  Author: Krzysztof Parzyszek <kparzysz at quicinc.com>
  Date:   2022-09-21 (Wed, 21 Sep 2022)

  Changed paths:
    M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
    M llvm/lib/Target/Hexagon/HexagonISelLowering.h
    M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
    M llvm/lib/Target/Hexagon/HexagonPatternsHVX.td
    M llvm/test/CodeGen/Hexagon/autohvx/int-to-fp.ll
    M llvm/test/CodeGen/Hexagon/autohvx/isel-truncate.ll
    M llvm/test/CodeGen/Hexagon/autohvx/widen-trunc.ll

  Log Message:
  -----------
  [Hexagon] Revamp type legalization of ext/trunc/sat in HVX

Resizing operations (e.g. sign extension) in DAG can go from any width
to any other width, e.g. i8 -> i32. If the input and the result differ
by a factor larger than 2, the operation cannot be legal in HVX, since
the only two legal vector sizes in HVX are a single vector and a pair
of vectors.
To simplify the legalization, such operations are expanded into steps
that only double/halve the type size, so that each such step can be fully
legalized on its own. The complication is that DAG will automatically
fold these steps back into one, e.g. sext(sext) -> sext. To prevent that
new HexagonISD nodes are introduced: TL_EXTEND and TL_TRUNCATE. Once
legalized, these nodes are replaced with the original opcodes.

The type legalization is now common to aext/sext/zext/trunc and Hexagon-
specific ssat/usat nodes.