[all-commits] [llvm/llvm-project] 963287: Add a baseline test for D131958
Alexander Richardson via All-commits
all-commits at lists.llvm.org
Wed Sep 21 05:50:50 PDT 2022
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 963287acbf42867a8f7a14b1db0043daf22174f2
https://github.com/llvm/llvm-project/commit/963287acbf42867a8f7a14b1db0043daf22174f2
Author: Alex Richardson <alexrichardson at google.com>
Date: 2022-09-21 (Wed, 21 Sep 2022)
Changed paths:
A llvm/test/CodeGen/AArch64/avoid-zero-copy.mir
A llvm/test/CodeGen/Mips/avoid-zero-copy.mir
Log Message:
-----------
Add a baseline test for D131958
This test shows that the save of MIPS $zero to a callee-saved register
is not elided by the machine-cp pass.
Differential Revision: https://reviews.llvm.org/D131957
Commit: b84be9f2f1acb7229e4a4fa12e0832854c22bd57
https://github.com/llvm/llvm-project/commit/b84be9f2f1acb7229e4a4fa12e0832854c22bd57
Author: Alex Richardson <Alexander.Richardson at cl.cam.ac.uk>
Date: 2022-09-21 (Wed, 21 Sep 2022)
Changed paths:
M llvm/test/CodeGen/AArch64/avoid-zero-copy.mir
M llvm/test/CodeGen/Mips/avoid-zero-copy.mir
M llvm/test/CodeGen/RISCV/double-convert.ll
M llvm/utils/TableGen/RegisterInfoEmitter.cpp
Log Message:
-----------
Add all constant physical registers to callee preserved masks
This allows MachineCopyPropagation to eliminate copies of constant registers
such as zero registers. They were previously not being eliminated as the
check for MO.clobbersPhysReg(AvailSrc) would return true for constant
registers such as MIPS $zero.
To avoid having to manually add the zero registers to all CalleeSavedRegs
instantiations in tablegen, I instead added a new isConstant bit to the
Register and set this for MIPS, RISC-V, and AArch64 zero registers.
RegisterInfoEmitter.cpp looks at this flag and adds all constant registers
to the preserved register mask.
This may also benefit other passes but so far I have only seen differences
in MachineCopyPropagation. In the future it might make sense to generate
`isConstantPhysReg()` from this information.
Original source: https://github.com/CTSRD-CHERI/llvm-project/commit/8588d8b81458ed6d87b674893e7752e6a6915574
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D131958
Compare: https://github.com/llvm/llvm-project/compare/9926ad17525a...b84be9f2f1ac
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