[all-commits] [llvm/llvm-project] 2e8817: [AMDGPU] SIFixSGPRCopies reworking to use one pass...

[alex-t via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2e8817b90a9aa38c681ca1bb9075f9e8eed3f6e8
      https://github.com/llvm/llvm-project/commit/2e8817b90a9aa38c681ca1bb9075f9e8eed3f6e8
  Author: Alexander Timofeev <alexander.timofeev at amd.com>
  Date:   2022-09-19 (Mon, 19 Sep 2022)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
    M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.mir
    M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll

  Log Message:
  -----------
  [AMDGPU] SIFixSGPRCopies reworking to use one pass over the MIR for analysis and lowering.

This change finalizes the series of patches aiming to replace the old strategy of VGPR to SGPR copy lowering.

  # Following the https://reviews.llvm.org/D128252 and https://reviews.llvm.org/D130367 code parts that are no longer used were removed.
  # The first pass over the MachineFunctoin collects all the necessary information.
  # Lowering is done in 3 phases:
     - VGPR to SGPR copies analysis  lowering
     - REG_SEQUENCE, PHIs, and SGPR to VGPR copies lowering
     - SCC copies lowering is done in a separate pass over the Machine Function

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D131246