[all-commits] [llvm/llvm-project] d60ae4: [RISCV] Fix logic for determining RVV stack padding

[Fraser Cormack via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d60ae47f9dabcbc42b894f988b51d4643447b599
      https://github.com/llvm/llvm-project/commit/d60ae47f9dabcbc42b894f988b51d4643447b599
  Author: Fraser Cormack <fraser at codeplay.com>
  Date:   2022-05-20 (Fri, 20 May 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
    M llvm/test/CodeGen/RISCV/rvv/wrong-stack-slot-rv32.mir

  Log Message:
  -----------
  [RISCV] Fix logic for determining RVV stack padding

We must add padding when using SP or BP to access stack objects.
Checking whether we're missing FP is not sufficient as stack realignment
uses SP too. The test in D125962 explains the specific issue in more
detail.

Split from D125787.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D125964