[all-commits] [llvm/llvm-project] a35107: [RISCV] Add a test showing overlapping stack offse...

Fraser Cormack via All-commits all-commits at lists.llvm.org
Fri May 20 05:11:56 PDT 2022


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a351070710f51cc41b181130080ac9da514989d7
      https://github.com/llvm/llvm-project/commit/a351070710f51cc41b181130080ac9da514989d7
  Author: Fraser Cormack <fraser at codeplay.com>
  Date:   2022-05-20 (Fri, 20 May 2022)

  Changed paths:
    M llvm/test/CodeGen/RISCV/rvv/wrong-stack-slot-rv32.mir

  Log Message:
  -----------
  [RISCV] Add a test showing overlapping stack offsets with RVV

This test (and its forthcoming fix) was split off from D125787. It shows
that the logic we use to determine when we need to add extra RVV padding
is insufficient.

In this example, we may have a situation involving dynamic stack
alignment -- but no variable-sized objects -- where we have no FP but
must still use SP to index objects. In this case we also need the
extra RVV padding, otherwise objects may overlap. Specifically, the test
shows that the RVV vector object may clobber the lowest callee-save.

    |------------------------------| -- <-- Incoming SP
    | 4-byte callee-save (ra)      |
    |------------------------------| -- <-- SP + VLENB*2 + 60
    | 4-byte callee-save (s0)      |
    |------------------------------| -- <-- SP + VLENB*2 + 56  --
    | 4-byte callee-save (s9)      |                            |
    |------------------------------| -- <-- SP + VLENB*2 + 52   | RVV object(!!)
    | VLENB*2 RVV object           |                            |
    |------------------------------| -- <-- SP + 56            --
    | 4-byte local object          |
    |------------------------------| -- <-- SP + 32
    | Dead area                    |
    |------------------------------| -- <-- InSP - 2*VLENB - 64
    | Possibly-zero realignment    |
    |------------------------------| -- <-- SP (realigned to 32)

This diagram should help show that when SP==InSP -- e.g., when the incoming SP
is 32-byte aligned, subtracting 2*VLENB+64 may keep it that way -- the RVV
object clobbers the spill of s9.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D125962




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