[all-commits] [llvm/llvm-project] 31f951: [TableGen][CodeEmitter] Introducing the VarLenCode...
Min-Yih Hsu via All-commits
all-commits at lists.llvm.org
Fri Feb 11 09:33:03 PST 2022
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 31f9519d48c26bd542253cc20dc333732c991332
https://github.com/llvm/llvm-project/commit/31f9519d48c26bd542253cc20dc333732c991332
Author: Min-Yih Hsu <minyihh at uci.edu>
Date: 2022-02-11 (Fri, 11 Feb 2022)
Changed paths:
M llvm/include/llvm/Target/Target.td
A llvm/test/TableGen/VarLenEncoder.td
M llvm/utils/TableGen/CMakeLists.txt
M llvm/utils/TableGen/CodeEmitterGen.cpp
A llvm/utils/TableGen/VarLenCodeEmitterGen.cpp
A llvm/utils/TableGen/VarLenCodeEmitterGen.h
Log Message:
-----------
[TableGen][CodeEmitter] Introducing the VarLenCodeEmitterGen infrastructure
Full write up:
https://gist.github.com/mshockwave/66e98d099256deefc062633909bb7b5b
The existing CodeEmitterGen infrastructure is unable to generate encoder
function for ISAs with variable-length instructions. This patch
introduces a new infrastructure to support variable-length instruction
encoding, including a new TableGen syntax for writing instruction
encoding directives and a new TableGen backend component,
VarLenCodeEmitterGen, built on top of CodeEmitterGen.
Differential Revision: https://reviews.llvm.org/D115128
Commit: 08f2b0dcf61fbe037d363c1e6ff20aaee4875dfe
https://github.com/llvm/llvm-project/commit/08f2b0dcf61fbe037d363c1e6ff20aaee4875dfe
Author: Min-Yih Hsu <minyihh at uci.edu>
Date: 2022-02-11 (Fri, 11 Feb 2022)
Changed paths:
M llvm/lib/Target/M68k/CMakeLists.txt
M llvm/lib/Target/M68k/M68kInstrArithmetic.td
M llvm/lib/Target/M68k/M68kInstrFormats.td
M llvm/lib/Target/M68k/M68kInstrInfo.td
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCCodeEmitter.cpp
M llvm/test/CodeGen/M68k/Control/cmp.ll
M llvm/test/MC/Disassembler/M68k/arithmetic.txt
Log Message:
-----------
[M68k] Adopt the new VarLenCodeEmitterGen for arithmetic instructions
This patch refactors all the existing M68k arithmetic instructions
to use the new VarLenCodeEmitterGen infrastructure.
This patch is tested by the existing MC test cases.
Note that one of the codegen tests needed to be updated because the
ordering of two equivalent instructions were switched.
Differential Revision: https://reviews.llvm.org/D115234
Compare: https://github.com/llvm/llvm-project/compare/b59ad64eadc0...08f2b0dcf61f
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