[all-commits] [llvm/llvm-project] 0176fe: [SVE][CodeGen] Expand SVE MULH[SU] and [SU]MUL_LOH...

[Fraser Cormack via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0176fecfbcd6b867fd31d7b85cc748220150babc
      https://github.com/llvm/llvm-project/commit/0176fecfbcd6b867fd31d7b85cc748220150babc
  Author: Fraser Cormack <fraser at codeplay.com>
  Date:   2021-02-18 (Thu, 18 Feb 2021)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/test/CodeGen/AArch64/sve-int-arith-imm.ll

  Log Message:
  -----------
  [SVE][CodeGen] Expand SVE MULH[SU] and [SU]MUL_LOHI nodes

This patch fixes a codegen crash introduced in fde24661718c, where the
DAGCombiner started generating optimized MULH[SU] or [SU]MUL_LOHI nodes
unless the target opted out. The AArch64 backend cannot currently select
any of these nodes, so ensure that they are not generated in the first
place.

This issue was raised by @huihuiz in D94501.

Reviewed By: paulwalker-arm

Differential Revision: https://reviews.llvm.org/D96849