[all-commits] [llvm/llvm-project] 5a31a6: [RISCV] Frame handling for RISC-V V extension.

Kai Wang via All-commits all-commits at lists.llvm.org
Tue Feb 16 22:37:15 PST 2021


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5a31a67385c900244dede8defedacfa4fe79f370
      https://github.com/llvm/llvm-project/commit/5a31a67385c900244dede8defedacfa4fe79f370
  Author: Hsiangkai Wang <kai.wang at sifive.com>
  Date:   2021-02-17 (Wed, 17 Feb 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
    M llvm/lib/Target/RISCV/RISCVFrameLowering.h
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.h
    M llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h
    M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
    A llvm/test/CodeGen/RISCV/rvv/access-fixed-objects-by-rvv.ll
    A llvm/test/CodeGen/RISCV/rvv/allocate-lmul-2-4-8.ll
    A llvm/test/CodeGen/RISCV/rvv/localvar.ll
    A llvm/test/CodeGen/RISCV/rvv/memory-args.ll

  Log Message:
  -----------
  [RISCV] Frame handling for RISC-V V extension.

This patch proposes how to deal with RISC-V vector frame objects. The
layout of RISC-V vector frame will look like

|---------------------------------|
| scalar callee-saved registers   |
|---------------------------------|
| scalar local variables          |
|---------------------------------|
| scalar outgoing arguments       |
|---------------------------------|
| RVV local variables &&          |
| RVV outgoing arguments          |
|---------------------------------| <- end of frame (sp)

If there is realignment or variable length array in the stack, we will use
frame pointer to access fixed objects and stack pointer to access
non-fixed objects.

|---------------------------------| <- frame pointer (fp)
| scalar callee-saved registers   |
|---------------------------------|
| scalar local variables          |
|---------------------------------|
| ///// realignment /////         |
|---------------------------------|
| scalar outgoing arguments       |
|---------------------------------|
| RVV local variables &&          |
| RVV outgoing arguments          |
|---------------------------------| <- end of frame (sp)

If there are both realignment and variable length array in the stack, we
will use frame pointer to access fixed objects and base pointer to access
non-fixed objects.

|---------------------------------| <- frame pointer (fp)
| scalar callee-saved registers   |
|---------------------------------|
| scalar local variables          |
|---------------------------------|
| ///// realignment /////         |
|---------------------------------| <- base pointer (bp)
| RVV local variables &&          |
| RVV outgoing arguments          |
|---------------------------------|
| /////////////////////////////// |
| variable length array           |
| /////////////////////////////// |
|---------------------------------| <- end of frame (sp)
| scalar outgoing arguments       |
|---------------------------------|

In this version, we do not save the addresses of RVV objects in the
stack. We access them directly through the polynomial expression
(a x VLENB + b). We do not reserve frame pointer when there is any RVV
object in the stack. So, we also access the scalar frame objects through the
polynomial expression (a x VLENB + b) if the access across RVV stack
area.

Differential Revision: https://reviews.llvm.org/D94465


  Commit: a3c783dbf27f0a65472906dafc455b5165ed881a
      https://github.com/llvm/llvm-project/commit/a3c783dbf27f0a65472906dafc455b5165ed881a
  Author: Hsiangkai Wang <kai.wang at sifive.com>
  Date:   2021-02-17 (Wed, 17 Feb 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
    A llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll
    A llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector.ll
    A llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll
    A llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector.ll
    A llvm/test/CodeGen/RISCV/spill-fpr-scalar.ll

  Log Message:
  -----------
  [RISCV] Spilling for RISC-V V extension. (2nd version)

Differential Revision: https://reviews.llvm.org/D95148


Compare: https://github.com/llvm/llvm-project/compare/0e3d7e61867d...a3c783dbf27f


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