[all-commits] [llvm/llvm-project] d44bf3: [X86] Add reduced test case for PR49162

[Simon Pilgrim via All-commits]

  Branch: refs/heads/release/12.x
  Home:   https://github.com/llvm/llvm-project
  Commit: d44bf3332b314b8f325e6a04c268ae77691f8454
      https://github.com/llvm/llvm-project/commit/d44bf3332b314b8f325e6a04c268ae77691f8454
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2021-02-16 (Tue, 16 Feb 2021)

  Changed paths:
    A llvm/test/CodeGen/X86/pr49162.ll

  Log Message:
  -----------
  [X86] Add reduced test case for PR49162

(cherry picked from commit 5ca3ef98a71598d368f6f4aaf0b385b50b67ce4a)


  Commit: d9910c24fe195c69c68ed2d9ec18cf17a7d60dc7
      https://github.com/llvm/llvm-project/commit/d9910c24fe195c69c68ed2d9ec18cf17a7d60dc7
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2021-02-16 (Tue, 16 Feb 2021)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/test/CodeGen/X86/pr49162.ll

  Log Message:
  -----------
  [DAG] Fix shift amount limit in SimplifyDemandedBits trunc(shift(x,c)) to truncated bitwidth

We lost this in D56387/rG69bc0990a9181e6eb86228276d2f59435a7fae67 - where I got the src/dst bitwidths mixed up and assumed getValidShiftAmountConstant would catch it.

Patch by @craig.topper - confirmed by @Carrot that it fixes PR49162

(cherry picked from commit 7ad0c573bd4a68dc81886037457d47daa3d6aa24)


Compare: https://github.com/llvm/llvm-project/compare/d5d089bf08c9...d9910c24fe19