[all-commits] [llvm/llvm-project] b72ca7: [VE] Support intrinsic to isnert/extract_subreg of...

[Kazushi Marukawa via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b72ca799823e97b94ac0144bb87c094fb2db7324
      https://github.com/llvm/llvm-project/commit/b72ca799823e97b94ac0144bb87c094fb2db7324
  Author: Kazushi (Jam) Marukawa <marukawa at nec.com>
  Date:   2021-01-11 (Mon, 11 Jan 2021)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsVE.td
    M llvm/lib/Target/VE/VEInstrIntrinsicVL.td
    A llvm/test/CodeGen/VE/VELIntrinsics/extract.ll
    A llvm/test/CodeGen/VE/VELIntrinsics/insert.ll

  Log Message:
  -----------
  [VE] Support intrinsic to isnert/extract_subreg of v512i1

Support insert/extract_subreg intrinsic instructions for v512i1
registers and add regression tests.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D94298