[llvm-dev] vectorization and vliw(very long instruction word)

Martin J. O'Riordan via llvm-dev llvm-dev at lists.llvm.org
Mon Feb 20 06:47:17 PST 2017

Actually, we didn’t do this in any new transform pass, though we do custom lowering for many operations (e.g. shuffle); but the majority of the descriptions are in normal TableGen files.  This goes though the usual LLVM instruction selection as chains of dependent instructions.  The only other critical thing was to use ‘setOperationAction’ to select ‘Expand’, ‘Legal ‘and ‘Custom’ as appropriate to the instruction set.


Pre-RA scheduling simply insures that appropriate schedules are correct for each chain, and the Post-RA scheduler then lays each chain down (bottom up in our model) and creates the bundles representing the VLIW instruction.


The Hexagon target is a nice example of an in-tree target that does this.




From: yangzhh at mail.ustc.edu.cn [mailto:yangzhh at mail.ustc.edu.cn] 
Sent: 20 February 2017 13:31
To: Martin J. O'Riordan <martin.oriordan at movidius.com>
Cc: 'LLVM Developers' <llvm-dev at lists.llvm.org>
Subject: Re: RE: [llvm-dev] vectorization and vliw(very long instruction word)


Thanks, I will modify some transform pass, because my specific target processor. I don't think this a good way, but I think this a easier way. Could I do that? 

在2017-02-20 20:47:36,Martin J. O'Riordanmartin.oriordan at movidius.com <mailto:martin.oriordan at movidius.com> 写道:

Our approach is to let instruction selection and vectorisation happen as if the instruction set was single-issue, and use the post-RA scheduler to fill the VLIW slots with instructions from each of the functional-units [FUs] on a first-come, first-served basis.  This works quite well in conjunction with some mutation patterns that allow an instruction from an alternative FU to be substituted if the preferred FU is busy.


The VLWI nature of the target and the instruction selection and vectorisation are largely orthogonal.  There are scheduling, register allocation and instruction selection decisions that an expert human programmer might do differently, but overall the compiler still produces solutions that are competitive with the solutions determined by expert assembly programmers.




From: llvm-dev [mailto:llvm-dev-bounces at lists.llvm.org <mailto:llvm-dev-bounces at lists.llvm.org> ] On Behalf Of via llvm-dev
Sent: 20 February 2017 02:37
To: llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org> 
Subject: [llvm-dev] vectorization and vliw(very long instruction word)


Hello, I want to implement vectorization and vliw(very long instruction word) in my specific dsp ,do you have any advices to me ? 
Thank you very much!

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