[llvm-dev] Is there a way to determine what CPU resource is used by which instruction?

John Criswell via llvm-dev llvm-dev at lists.llvm.org
Tue Oct 20 07:06:15 PDT 2015

On 10/19/15 4:20 PM, Rail Shafigulin wrote:
> On Mon, Oct 19, 2015 at 1:07 PM, John Criswell <jtcriswel at gmail.com 
> <mailto:jtcriswel at gmail.com>> wrote:
>     Dear Rail,
>     Can you clarify what you mean by "processor resource?"  Are you
>     talking about architecture-visible state (like registers) or
>     micro-architecture state (like ALUs) that are typically not
>     visible at the ISA-level?
>     Regards,
>     John Criswell
> John,
> Thanks for the reply. I'm talking about micro-architecture state, i.e. 
> number of ALUs currently available (i.e. that are not preforming any 
> computation at the moment), number of Load and Store units, number of 
> floating point multiply and divide units etc.

Okay.  To further clarify, are you asking whether the code generator has 
information on micro-architecture and how to query that information, or 
are you asking how to output that information in the AsmPrinter?

I don't spend a lot of time in the LLVM code generator, so I don't know 
the answer to either question (I just wanted you to clarify your 
question so that someone more knowledgeable can answer).  That said, I'd 
be surprised if the code generator is aware of the micro-architecture 
details to the precision that you're describing. If you can find that 
information in the TableGen files, then it probably is there, but 
otherwise, I would expect the code generator to be using some sort of 
cost approximation to determine instruction order.

Anyone more knowledgeable have a more definitive answer?


John Criswell

> I would greatly appreciate any help on this.
> Thanks

John Criswell
Assistant Professor
Department of Computer Science, University of Rochester

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